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Merge branch 'timers/clockevents' of git://git.linaro.org/people/dlez…
…cano/clockevents into timers/urgent * New clocksource drivers for ARM SoCs to share
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* ARM Global Timer | ||
Cortex-A9 are often associated with a per-core Global timer. | ||
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** Timer node required properties: | ||
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- compatible : Should be "arm,cortex-a9-global-timer" | ||
Driver supports versions r2p0 and above. | ||
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- interrupts : One interrupt to each core | ||
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- reg : Specify the base address and the size of the GT timer | ||
register window. | ||
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- clocks : Should be phandle to a clock. | ||
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Example: | ||
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timer@2c000600 { | ||
compatible = "arm,cortex-a9-global-timer"; | ||
reg = <0x2c000600 0x20>; | ||
interrupts = <1 13 0xf01>; | ||
clocks = <&arm_periph_clk>; | ||
}; |
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Documentation/devicetree/bindings/timer/marvell,orion-timer.txt
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Marvell Orion SoC timer | ||
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Required properties: | ||
- compatible: shall be "marvell,orion-timer" | ||
- reg: base address of the timer register starting with TIMERS CONTROL register | ||
- interrupt-parent: phandle of the bridge interrupt controller | ||
- interrupts: should contain the interrupts for Timer0 and Timer1 | ||
- clocks: phandle of timer reference clock (tclk) | ||
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Example: | ||
timer: timer { | ||
compatible = "marvell,orion-timer"; | ||
reg = <0x20300 0x20>; | ||
interrupt-parent = <&bridge_intc>; | ||
interrupts = <1>, <2>; | ||
clocks = <&core_clk 0>; | ||
}; |
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