Skip to content

Commit

Permalink
clk: sunxi-ng: a83t: Add pll-video0 as parent of csi-mclk
Browse files Browse the repository at this point in the history
Allwinner's BSP for the A83T lists pll-video0 as the first parent to
csi-mclk with index 0. This parent is not listed in the datasheet, but
actually works, and makes more sense considering the index is the
default value out of reset.

Add pll-video0 as a parent to csi-mclk with index 0.

Fixes: 05359be ("clk: sunxi-ng: Add driver for A83T CCU")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
  • Loading branch information
Chen-Yu Tsai authored and Maxime Ripard committed Apr 9, 2019
1 parent 6597ce3 commit b3adde0
Showing 1 changed file with 3 additions and 2 deletions.
5 changes: 3 additions & 2 deletions drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
Original file line number Diff line number Diff line change
Expand Up @@ -513,8 +513,9 @@ static SUNXI_CCU_GATE(csi_misc_clk, "csi-misc", "osc24M", 0x130, BIT(16), 0);

static SUNXI_CCU_GATE(mipi_csi_clk, "mipi-csi", "osc24M", 0x130, BIT(31), 0);

static const char * const csi_mclk_parents[] = { "pll-de", "osc24M" };
static const u8 csi_mclk_table[] = { 3, 5 };
static const char * const csi_mclk_parents[] = { "pll-video0", "pll-de",
"osc24M" };
static const u8 csi_mclk_table[] = { 0, 3, 5 };
static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(csi_mclk_clk, "csi-mclk",
csi_mclk_parents, csi_mclk_table,
0x134,
Expand Down

0 comments on commit b3adde0

Please sign in to comment.