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Merge tag 'mlx5-updates-2019-06-13' of git://git.kernel.org/pub/scm/l…
…inux/kernel/git/saeed/linux Saeed Mahameed says: ==================== mlx5-updates-2019-06-13 Mlx5 devlink health fw reporters and sw reset support This series provides mlx5 firmware reset support and firmware devlink health reporters. 1) Add initial mlx5 kernel documentation and include devlink health reporters 2) Add CR-Space access and FW Crdump snapshot support via devlink region_snapshot 3) Issue software reset upon FW asserts 4) Add fw and fw_fatal devlink heath reporters to follow fw errors indication by dump and recover procedures and enable trigger these functionality by user. 4.1) fw reporter: The fw reporter implements diagnose and dump callbacks. It follows symptoms of fw error such as fw syndrome by triggering fw core dump and storing it and any other fw trace into the dump buffer. The fw reporter diagnose command can be triggered any time by the user to check current fw status. 4.2) fw_fatal repoter: The fw_fatal reporter implements dump and recover callbacks. It follows fatal errors indications by CR-space dump and recover flow. The CR-space dump uses vsc interface which is valid even if the FW command interface is not functional, which is the case in most FW fatal errors. The CR-space dump is stored as a memory region snapshot to ease read by address. The recover function runs recover flow which reloads the driver and triggers fw reset if needed. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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intel/i40e | ||
intel/iavf | ||
intel/ice | ||
mellanox/mlx5 | ||
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.. only:: subproject | ||
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Documentation/networking/device_drivers/mellanox/mlx5.rst
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.. SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB | ||
================================================= | ||
Mellanox ConnectX(R) mlx5 core VPI Network Driver | ||
================================================= | ||
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Copyright (c) 2019, Mellanox Technologies LTD. | ||
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Contents | ||
======== | ||
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- `Enabling the driver and kconfig options`_ | ||
- `Devlink health reporters`_ | ||
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Enabling the driver and kconfig options | ||
================================================ | ||
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| mlx5 core is modular and most of the major mlx5 core driver features can be selected (compiled in/out) | ||
| at build time via kernel Kconfig flags. | ||
| Basic features, ethernet net device rx/tx offloads and XDP, are available with the most basic flags | ||
| CONFIG_MLX5_CORE=y/m and CONFIG_MLX5_CORE_EN=y. | ||
| For the list of advanced features please see below. | ||
**CONFIG_MLX5_CORE=(y/m/n)** (module mlx5_core.ko) | ||
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| The driver can be enabled by choosing CONFIG_MLX5_CORE=y/m in kernel config. | ||
| This will provide mlx5 core driver for mlx5 ulps to interface with (mlx5e, mlx5_ib). | ||
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**CONFIG_MLX5_CORE_EN=(y/n)** | ||
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| Choosing this option will allow basic ethernet netdevice support with all of the standard rx/tx offloads. | ||
| mlx5e is the mlx5 ulp driver which provides netdevice kernel interface, when chosen, mlx5e will be | ||
| built-in into mlx5_core.ko. | ||
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**CONFIG_MLX5_EN_ARFS=(y/n)** | ||
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| Enables Hardware-accelerated receive flow steering (arfs) support, and ntuple filtering. | ||
| https://community.mellanox.com/s/article/howto-configure-arfs-on-connectx-4 | ||
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**CONFIG_MLX5_EN_RXNFC=(y/n)** | ||
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| Enables ethtool receive network flow classification, which allows user defined | ||
| flow rules to direct traffic into arbitrary rx queue via ethtool set/get_rxnfc API. | ||
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**CONFIG_MLX5_CORE_EN_DCB=(y/n)**: | ||
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| Enables `Data Center Bridging (DCB) Support <https://community.mellanox.com/s/article/howto-auto-config-pfc-and-ets-on-connectx-4-via-lldp-dcbx>`_. | ||
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**CONFIG_MLX5_MPFS=(y/n)** | ||
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| Ethernet Multi-Physical Function Switch (MPFS) support in ConnectX NIC. | ||
| MPFs is required for when `Multi-Host <http://www.mellanox.com/page/multihost>`_ configuration is enabled to allow passing | ||
| user configured unicast MAC addresses to the requesting PF. | ||
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**CONFIG_MLX5_ESWITCH=(y/n)** | ||
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| Ethernet SRIOV E-Switch support in ConnectX NIC. E-Switch provides internal SRIOV packet steering | ||
| and switching for the enabled VFs and PF in two available modes: | ||
| 1) `Legacy SRIOV mode (L2 mac vlan steering based) <https://community.mellanox.com/s/article/howto-configure-sr-iov-for-connectx-4-connectx-5-with-kvm--ethernet-x>`_. | ||
| 2) `Switchdev mode (eswitch offloads) <https://www.mellanox.com/related-docs/prod_software/ASAP2_Hardware_Offloading_for_vSwitches_User_Manual_v4.4.pdf>`_. | ||
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**CONFIG_MLX5_CORE_IPOIB=(y/n)** | ||
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| IPoIB offloads & acceleration support. | ||
| Requires CONFIG_MLX5_CORE_EN to provide an accelerated interface for the rdma | ||
| IPoIB ulp netdevice. | ||
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**CONFIG_MLX5_FPGA=(y/n)** | ||
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| Build support for the Innova family of network cards by Mellanox Technologies. | ||
| Innova network cards are comprised of a ConnectX chip and an FPGA chip on one board. | ||
| If you select this option, the mlx5_core driver will include the Innova FPGA core and allow | ||
| building sandbox-specific client drivers. | ||
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**CONFIG_MLX5_EN_IPSEC=(y/n)** | ||
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| Enables `IPSec XFRM cryptography-offload accelaration <http://www.mellanox.com/related-docs/prod_software/Mellanox_Innova_IPsec_Ethernet_Adapter_Card_User_Manual.pdf>`_. | ||
**CONFIG_MLX5_EN_TLS=(y/n)** | ||
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| TLS cryptography-offload accelaration. | ||
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**CONFIG_MLX5_INFINIBAND=(y/n/m)** (module mlx5_ib.ko) | ||
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| Provides low-level InfiniBand/RDMA and `RoCE <https://community.mellanox.com/s/article/recommended-network-configuration-examples-for-roce-deployment>`_ support. | ||
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**External options** ( Choose if the corresponding mlx5 feature is required ) | ||
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- CONFIG_PTP_1588_CLOCK: When chosen, mlx5 ptp support will be enabled | ||
- CONFIG_VXLAN: When chosen, mlx5 vxaln support will be enabled. | ||
- CONFIG_MLXFW: When chosen, mlx5 firmware flashing support will be enabled (via devlink and ethtool). | ||
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Devlink health reporters | ||
======================== | ||
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tx reporter | ||
----------- | ||
The tx reporter is responsible of two error scenarios: | ||
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- TX timeout | ||
Report on kernel tx timeout detection. | ||
Recover by searching lost interrupts. | ||
- TX error completion | ||
Report on error tx completion. | ||
Recover by flushing the TX queue and reset it. | ||
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TX reporter also support Diagnose callback, on which it provides | ||
real time information of its send queues status. | ||
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User commands examples: | ||
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- Diagnose send queues status:: | ||
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$ devlink health diagnose pci/0000:82:00.0 reporter tx | ||
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- Show number of tx errors indicated, number of recover flows ended successfully, | ||
is autorecover enabled and graceful period from last recover:: | ||
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$ devlink health show pci/0000:82:00.0 reporter tx | ||
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fw reporter | ||
----------- | ||
The fw reporter implements diagnose and dump callbacks. | ||
It follows symptoms of fw error such as fw syndrome by triggering | ||
fw core dump and storing it into the dump buffer. | ||
The fw reporter diagnose command can be triggered any time by the user to check | ||
current fw status. | ||
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User commands examples: | ||
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- Check fw heath status:: | ||
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$ devlink health diagnose pci/0000:82:00.0 reporter fw | ||
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- Read FW core dump if already stored or trigger new one:: | ||
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$ devlink health dump show pci/0000:82:00.0 reporter fw | ||
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NOTE: This command can run only on the PF which has fw tracer ownership, | ||
running it on other PF or any VF will return "Operation not permitted". | ||
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fw fatal reporter | ||
----------------- | ||
The fw fatal reporter implements dump and recover callbacks. | ||
It follows fatal errors indications by CR-space dump and recover flow. | ||
The CR-space dump uses vsc interface which is valid even if the FW command | ||
interface is not functional, which is the case in most FW fatal errors. | ||
The recover function runs recover flow which reloads the driver and triggers fw | ||
reset if needed. | ||
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User commands examples: | ||
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- Run fw recover flow manually:: | ||
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$ devlink health recover pci/0000:82:00.0 reporter fw_fatal | ||
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- Read FW CR-space dump if already strored or trigger new one:: | ||
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$ devlink health dump show pci/0000:82:00.1 reporter fw_fatal | ||
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NOTE: This command can run only on PF. |
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// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB | ||
/* Copyright (c) 2019 Mellanox Technologies */ | ||
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#include <devlink.h> | ||
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#include "mlx5_core.h" | ||
#include "eswitch.h" | ||
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static int mlx5_devlink_flash_update(struct devlink *devlink, | ||
const char *file_name, | ||
const char *component, | ||
struct netlink_ext_ack *extack) | ||
{ | ||
struct mlx5_core_dev *dev = devlink_priv(devlink); | ||
const struct firmware *fw; | ||
int err; | ||
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if (component) | ||
return -EOPNOTSUPP; | ||
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err = request_firmware_direct(&fw, file_name, &dev->pdev->dev); | ||
if (err) | ||
return err; | ||
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return mlx5_firmware_flash(dev, fw, extack); | ||
} | ||
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static const struct devlink_ops mlx5_devlink_ops = { | ||
#ifdef CONFIG_MLX5_ESWITCH | ||
.eswitch_mode_set = mlx5_devlink_eswitch_mode_set, | ||
.eswitch_mode_get = mlx5_devlink_eswitch_mode_get, | ||
.eswitch_inline_mode_set = mlx5_devlink_eswitch_inline_mode_set, | ||
.eswitch_inline_mode_get = mlx5_devlink_eswitch_inline_mode_get, | ||
.eswitch_encap_mode_set = mlx5_devlink_eswitch_encap_mode_set, | ||
.eswitch_encap_mode_get = mlx5_devlink_eswitch_encap_mode_get, | ||
#endif | ||
.flash_update = mlx5_devlink_flash_update, | ||
}; | ||
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struct devlink *mlx5_devlink_alloc() | ||
{ | ||
return devlink_alloc(&mlx5_devlink_ops, sizeof(struct mlx5_core_dev)); | ||
} | ||
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void mlx5_devlink_free(struct devlink *devlink) | ||
{ | ||
devlink_free(devlink); | ||
} | ||
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int mlx5_devlink_register(struct devlink *devlink, struct device *dev) | ||
{ | ||
return devlink_register(devlink, dev); | ||
} | ||
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void mlx5_devlink_unregister(struct devlink *devlink) | ||
{ | ||
devlink_unregister(devlink); | ||
} |
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/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ | ||
/* Copyright (c) 2019, Mellanox Technologies */ | ||
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#ifndef __MLX5_DEVLINK_H__ | ||
#define __MLX5_DEVLINK_H__ | ||
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#include <net/devlink.h> | ||
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struct devlink *mlx5_devlink_alloc(void); | ||
void mlx5_devlink_free(struct devlink *devlink); | ||
int mlx5_devlink_register(struct devlink *devlink, struct device *dev); | ||
void mlx5_devlink_unregister(struct devlink *devlink); | ||
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#endif /* __MLX5_DEVLINK_H__ */ |
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// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB | ||
/* Copyright (c) 2019 Mellanox Technologies */ | ||
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#include <linux/mlx5/driver.h> | ||
#include "mlx5_core.h" | ||
#include "lib/pci_vsc.h" | ||
#include "lib/mlx5.h" | ||
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#define BAD_ACCESS 0xBADACCE5 | ||
#define MLX5_PROTECTED_CR_SCAN_CRSPACE 0x7 | ||
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static bool mlx5_crdump_enabled(struct mlx5_core_dev *dev) | ||
{ | ||
return !!dev->priv.health.crdump_size; | ||
} | ||
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static int mlx5_crdump_fill(struct mlx5_core_dev *dev, u32 *cr_data) | ||
{ | ||
u32 crdump_size = dev->priv.health.crdump_size; | ||
int i, ret; | ||
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for (i = 0; i < (crdump_size / 4); i++) | ||
cr_data[i] = BAD_ACCESS; | ||
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ret = mlx5_vsc_gw_read_block_fast(dev, cr_data, crdump_size); | ||
if (ret <= 0) { | ||
if (ret == 0) | ||
return -EIO; | ||
return ret; | ||
} | ||
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if (crdump_size != ret) { | ||
mlx5_core_warn(dev, "failed to read full dump, read %d out of %u\n", | ||
ret, crdump_size); | ||
return -EINVAL; | ||
} | ||
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return 0; | ||
} | ||
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int mlx5_crdump_collect(struct mlx5_core_dev *dev, u32 *cr_data) | ||
{ | ||
int ret; | ||
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if (!mlx5_crdump_enabled(dev)) | ||
return -ENODEV; | ||
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ret = mlx5_vsc_gw_lock(dev); | ||
if (ret) { | ||
mlx5_core_warn(dev, "crdump: failed to lock vsc gw err %d\n", | ||
ret); | ||
return ret; | ||
} | ||
/* Verify no other PF is running cr-dump or sw reset */ | ||
ret = mlx5_vsc_sem_set_space(dev, MLX5_SEMAPHORE_SW_RESET, | ||
MLX5_VSC_LOCK); | ||
if (ret) { | ||
mlx5_core_warn(dev, "Failed to lock SW reset semaphore\n"); | ||
goto unlock_gw; | ||
} | ||
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ret = mlx5_vsc_gw_set_space(dev, MLX5_VSC_SPACE_SCAN_CRSPACE, NULL); | ||
if (ret) | ||
goto unlock_sem; | ||
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ret = mlx5_crdump_fill(dev, cr_data); | ||
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unlock_sem: | ||
mlx5_vsc_sem_set_space(dev, MLX5_SEMAPHORE_SW_RESET, MLX5_VSC_UNLOCK); | ||
unlock_gw: | ||
mlx5_vsc_gw_unlock(dev); | ||
return ret; | ||
} | ||
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int mlx5_crdump_enable(struct mlx5_core_dev *dev) | ||
{ | ||
struct mlx5_priv *priv = &dev->priv; | ||
u32 space_size; | ||
int ret; | ||
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if (!mlx5_core_is_pf(dev) || !mlx5_vsc_accessible(dev) || | ||
mlx5_crdump_enabled(dev)) | ||
return 0; | ||
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ret = mlx5_vsc_gw_lock(dev); | ||
if (ret) | ||
return ret; | ||
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/* Check if space is supported and get space size */ | ||
ret = mlx5_vsc_gw_set_space(dev, MLX5_VSC_SPACE_SCAN_CRSPACE, | ||
&space_size); | ||
if (ret) { | ||
/* Unlock and mask error since space is not supported */ | ||
mlx5_vsc_gw_unlock(dev); | ||
return 0; | ||
} | ||
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if (!space_size) { | ||
mlx5_core_warn(dev, "Invalid Crspace size, zero\n"); | ||
mlx5_vsc_gw_unlock(dev); | ||
return -EINVAL; | ||
} | ||
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ret = mlx5_vsc_gw_unlock(dev); | ||
if (ret) | ||
return ret; | ||
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priv->health.crdump_size = space_size; | ||
return 0; | ||
} | ||
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void mlx5_crdump_disable(struct mlx5_core_dev *dev) | ||
{ | ||
dev->priv.health.crdump_size = 0; | ||
} |
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