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Merge tag 'drm-intel-next-2018-06-20' of git://anongit.freedesktop.or…
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…g/drm/drm-intel into drm-next

Chris is doing many reworks that allow us to get full-ppgtt supported
on all platforms back to HSW. As well many other fix and improvements,
Including:
- Use GEM suspend when aborting initialization (Chris)
- Change i915_gem_fault to return vm_fault_t (Chris)
- Expand VMA to Non gem object entities (Chris)
- Improve logs for load failure, but quite logging on fault injection to avoid noise on CI (Chris)
- Other page directory handling fixes and improvements for gen6 (Chris)
- Other gtt clean-up removing redundancies and unused checks (Chris)
- Reorder aliasing ppgtt fini (Chris)
- Refactor of unsetting obg->mm.pages (Chris)
- Apply batch location restrictions before pinning (Chris)
- Ringbuffer fixes for context restore (Chris)
- Execlist fixes on freeing error pointer on allocation error (Chris)
- Make closing request flush mandatory (Chris)
- Move GEM sanitize from resume_early to resume (Chris)
- Improve debug dumps (Chris)
- Silent compiler for selftest (Chris)
- Other execlists changes to improve hangcheck and reset.
- Many gtt page directory fixes and improvements (Chris)
- Reorg context workarounds (Chris)
- Avoid ERR_PTR dereference on selftest (Chris)

Other GEM related work:
- Stop trying to reset GPU if reset failed (Mika)
- Add HW workaround for KBL to fix GPU reset (Mika)
- Fix context ban and hang accounting for client (Mika)
- Fixes on OA perf (Michel, Jani)
- Refactor on GuC log mechanisms (Piotr)
- Enable provoking vertex fix on Gen9 system (Kenneth)

More ICL patches for Display enabling:
- ICL - 10-bit support for HDMI (RK)
- ICL - Start adding TBT PLL (Paulo)
- ICL - DDI HDMK level selection (Manasi)
- ICL - GMBUS GPIO pin mapping fix (Mahesh)
- ICL - Adding DP_AUX_E support (James)
- ICL - Display interrupts handling (DK)

Other display fixes and improvements:
- Fix sprite destination color keying on SKL+ (Ville)
- Fixes and improvements on PCH detection, specially for non PCH systems (Jani)
- Document PCH_NOP (Lucas)
- Allow DBLSCAN user modes with eDP/LVDS/DSI (Ville)
- Opregion and ACPI cleanup and organization (Jani)
- Kill delays when activation psr (Rodrigo)
- ...and a consequent fix of the psr activation flow (DK)
- Fix HDMI infoframe setting (Imre)
- Fix Display interrupts and modes on old gens (Ville)
- Start switching to kernel unsigned int types (Jani)
- Introduction to Amber Lake and Whiskey Lake platforms (Jose)
- Audio clock fixes for HBR3 (RK)
- Standardize i915_reg.h definitions according to our doc and checkpatch (Paulo)
- Remove unused timespec_to_jiffies_timeout function (Arnd)
- Increase the scope of PSR wake fix for other VBTs out there (Vathsala)
- Improve debug msgs with prop name/id (Ville)
- Other clean up on unecessary cursor size defines (Ville)
- Enforce max hdisplay/hblank_start limits on HSW/BDW (Ville)
- Make ELD pointers constant (Jani)
- Fix for PSR VBT parse (Colin)
- Add warn about unsupported CDCLK rates (Imre)

Signed-off-by: Dave Airlie <airlied@redhat.com>

# gpg: Signature made Thu 21 Jun 2018 07:12:10 AM AEST
# gpg:                using RSA key FA625F640EEB13CA
# gpg: Good signature from "Rodrigo Vivi <rodrigo.vivi@intel.com>"
# gpg:                 aka "Rodrigo Vivi <rodrigo.vivi@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6D20 7068 EEDD 6509 1C2C  E2A3 FA62 5F64 0EEB 13CA
Link: https://patchwork.freedesktop.org/patch/msgid/20180625165622.GA21761@intel.com
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Dave Airlie committed Jun 28, 2018
2 parents 3c8daa7 + e1cacec commit b4d4b0b
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Showing 100 changed files with 4,453 additions and 3,087 deletions.
20 changes: 10 additions & 10 deletions drivers/gpu/drm/i915/dvo_ch7017.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -159,7 +159,7 @@
#define CH7017_BANG_LIMIT_CONTROL 0x7f

struct ch7017_priv {
uint8_t dummy;
u8 dummy;
};

static void ch7017_dump_regs(struct intel_dvo_device *dvo);
Expand All @@ -186,7 +186,7 @@ static bool ch7017_read(struct intel_dvo_device *dvo, u8 addr, u8 *val)

static bool ch7017_write(struct intel_dvo_device *dvo, u8 addr, u8 val)
{
uint8_t buf[2] = { addr, val };
u8 buf[2] = { addr, val };
struct i2c_msg msg = {
.addr = dvo->slave_addr,
.flags = 0,
Expand Down Expand Up @@ -258,11 +258,11 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo,
const struct drm_display_mode *mode,
const struct drm_display_mode *adjusted_mode)
{
uint8_t lvds_pll_feedback_div, lvds_pll_vco_control;
uint8_t outputs_enable, lvds_control_2, lvds_power_down;
uint8_t horizontal_active_pixel_input;
uint8_t horizontal_active_pixel_output, vertical_active_line_output;
uint8_t active_input_line_output;
u8 lvds_pll_feedback_div, lvds_pll_vco_control;
u8 outputs_enable, lvds_control_2, lvds_power_down;
u8 horizontal_active_pixel_input;
u8 horizontal_active_pixel_output, vertical_active_line_output;
u8 active_input_line_output;

DRM_DEBUG_KMS("Registers before mode setting\n");
ch7017_dump_regs(dvo);
Expand Down Expand Up @@ -333,7 +333,7 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo,
/* set the CH7017 power state */
static void ch7017_dpms(struct intel_dvo_device *dvo, bool enable)
{
uint8_t val;
u8 val;

ch7017_read(dvo, CH7017_LVDS_POWER_DOWN, &val);

Expand Down Expand Up @@ -361,7 +361,7 @@ static void ch7017_dpms(struct intel_dvo_device *dvo, bool enable)

static bool ch7017_get_hw_state(struct intel_dvo_device *dvo)
{
uint8_t val;
u8 val;

ch7017_read(dvo, CH7017_LVDS_POWER_DOWN, &val);

Expand All @@ -373,7 +373,7 @@ static bool ch7017_get_hw_state(struct intel_dvo_device *dvo)

static void ch7017_dump_regs(struct intel_dvo_device *dvo)
{
uint8_t val;
u8 val;

#define DUMP(reg) \
do { \
Expand Down
22 changes: 11 additions & 11 deletions drivers/gpu/drm/i915/dvo_ch7xxx.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -85,7 +85,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/

static struct ch7xxx_id_struct {
uint8_t vid;
u8 vid;
char *name;
} ch7xxx_ids[] = {
{ CH7011_VID, "CH7011" },
Expand All @@ -96,7 +96,7 @@ static struct ch7xxx_id_struct {
};

static struct ch7xxx_did_struct {
uint8_t did;
u8 did;
char *name;
} ch7xxx_dids[] = {
{ CH7xxx_DID, "CH7XXX" },
Expand All @@ -107,7 +107,7 @@ struct ch7xxx_priv {
bool quiet;
};

static char *ch7xxx_get_id(uint8_t vid)
static char *ch7xxx_get_id(u8 vid)
{
int i;

Expand All @@ -119,7 +119,7 @@ static char *ch7xxx_get_id(uint8_t vid)
return NULL;
}

static char *ch7xxx_get_did(uint8_t did)
static char *ch7xxx_get_did(u8 did)
{
int i;

Expand All @@ -132,7 +132,7 @@ static char *ch7xxx_get_did(uint8_t did)
}

/** Reads an 8 bit register */
static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
{
struct ch7xxx_priv *ch7xxx = dvo->dev_priv;
struct i2c_adapter *adapter = dvo->i2c_bus;
Expand Down Expand Up @@ -170,11 +170,11 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
}

/** Writes an 8 bit register */
static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
{
struct ch7xxx_priv *ch7xxx = dvo->dev_priv;
struct i2c_adapter *adapter = dvo->i2c_bus;
uint8_t out_buf[2];
u8 out_buf[2];
struct i2c_msg msg = {
.addr = dvo->slave_addr,
.flags = 0,
Expand All @@ -201,7 +201,7 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
{
/* this will detect the CH7xxx chip on the specified i2c bus */
struct ch7xxx_priv *ch7xxx;
uint8_t vendor, device;
u8 vendor, device;
char *name, *devid;

ch7xxx = kzalloc(sizeof(struct ch7xxx_priv), GFP_KERNEL);
Expand Down Expand Up @@ -244,7 +244,7 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,

static enum drm_connector_status ch7xxx_detect(struct intel_dvo_device *dvo)
{
uint8_t cdet, orig_pm, pm;
u8 cdet, orig_pm, pm;

ch7xxx_readb(dvo, CH7xxx_PM, &orig_pm);

Expand Down Expand Up @@ -276,7 +276,7 @@ static void ch7xxx_mode_set(struct intel_dvo_device *dvo,
const struct drm_display_mode *mode,
const struct drm_display_mode *adjusted_mode)
{
uint8_t tvco, tpcp, tpd, tlpf, idf;
u8 tvco, tpcp, tpd, tlpf, idf;

if (mode->clock <= 65000) {
tvco = 0x23;
Expand Down Expand Up @@ -336,7 +336,7 @@ static void ch7xxx_dump_regs(struct intel_dvo_device *dvo)
int i;

for (i = 0; i < CH7xxx_NUM_REGS; i++) {
uint8_t val;
u8 val;
if ((i % 8) == 0)
DRM_DEBUG_KMS("\n %02X: ", i);
ch7xxx_readb(dvo, i, &val);
Expand Down
26 changes: 13 additions & 13 deletions drivers/gpu/drm/i915/dvo_ivch.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -161,7 +161,7 @@
* instead. The following list contains all registers that
* require saving.
*/
static const uint16_t backup_addresses[] = {
static const u16 backup_addresses[] = {
0x11, 0x12,
0x18, 0x19, 0x1a, 0x1f,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
Expand All @@ -174,11 +174,11 @@ static const uint16_t backup_addresses[] = {
struct ivch_priv {
bool quiet;

uint16_t width, height;
u16 width, height;

/* Register backup */

uint16_t reg_backup[ARRAY_SIZE(backup_addresses)];
u16 reg_backup[ARRAY_SIZE(backup_addresses)];
};


Expand All @@ -188,7 +188,7 @@ static void ivch_dump_regs(struct intel_dvo_device *dvo);
*
* Each of the 256 registers are 16 bits long.
*/
static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
static bool ivch_read(struct intel_dvo_device *dvo, int addr, u16 *data)
{
struct ivch_priv *priv = dvo->dev_priv;
struct i2c_adapter *adapter = dvo->i2c_bus;
Expand Down Expand Up @@ -231,7 +231,7 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
}

/* Writes a 16-bit register on the ivch */
static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
static bool ivch_write(struct intel_dvo_device *dvo, int addr, u16 data)
{
struct ivch_priv *priv = dvo->dev_priv;
struct i2c_adapter *adapter = dvo->i2c_bus;
Expand Down Expand Up @@ -263,7 +263,7 @@ static bool ivch_init(struct intel_dvo_device *dvo,
struct i2c_adapter *adapter)
{
struct ivch_priv *priv;
uint16_t temp;
u16 temp;
int i;

priv = kzalloc(sizeof(struct ivch_priv), GFP_KERNEL);
Expand Down Expand Up @@ -342,7 +342,7 @@ static void ivch_reset(struct intel_dvo_device *dvo)
static void ivch_dpms(struct intel_dvo_device *dvo, bool enable)
{
int i;
uint16_t vr01, vr30, backlight;
u16 vr01, vr30, backlight;

ivch_reset(dvo);

Expand Down Expand Up @@ -379,7 +379,7 @@ static void ivch_dpms(struct intel_dvo_device *dvo, bool enable)

static bool ivch_get_hw_state(struct intel_dvo_device *dvo)
{
uint16_t vr01;
u16 vr01;

ivch_reset(dvo);

Expand All @@ -398,9 +398,9 @@ static void ivch_mode_set(struct intel_dvo_device *dvo,
const struct drm_display_mode *adjusted_mode)
{
struct ivch_priv *priv = dvo->dev_priv;
uint16_t vr40 = 0;
uint16_t vr01 = 0;
uint16_t vr10;
u16 vr40 = 0;
u16 vr01 = 0;
u16 vr10;

ivch_reset(dvo);

Expand All @@ -416,7 +416,7 @@ static void ivch_mode_set(struct intel_dvo_device *dvo,

if (mode->hdisplay != adjusted_mode->crtc_hdisplay ||
mode->vdisplay != adjusted_mode->crtc_vdisplay) {
uint16_t x_ratio, y_ratio;
u16 x_ratio, y_ratio;

vr01 |= VR01_PANEL_FIT_ENABLE;
vr40 |= VR40_CLOCK_GATING_ENABLE;
Expand All @@ -438,7 +438,7 @@ static void ivch_mode_set(struct intel_dvo_device *dvo,

static void ivch_dump_regs(struct intel_dvo_device *dvo)
{
uint16_t val;
u16 val;

ivch_read(dvo, VR00, &val);
DRM_DEBUG_KMS("VR00: 0x%04x\n", val);
Expand Down
44 changes: 22 additions & 22 deletions drivers/gpu/drm/i915/dvo_ns2501.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -191,8 +191,8 @@ enum {
};

struct ns2501_reg {
uint8_t offset;
uint8_t value;
u8 offset;
u8 value;
};

/*
Expand All @@ -202,23 +202,23 @@ struct ns2501_reg {
* read all this with a grain of salt.
*/
struct ns2501_configuration {
uint8_t sync; /* configuration of the C0 register */
uint8_t conf; /* configuration register 8 */
uint8_t syncb; /* configuration register 41 */
uint8_t dither; /* configuration of the dithering */
uint8_t pll_a; /* PLL configuration, register A, 1B */
uint16_t pll_b; /* PLL configuration, register B, 1C/1D */
uint16_t hstart; /* horizontal start, registers C1/C2 */
uint16_t hstop; /* horizontal total, registers C3/C4 */
uint16_t vstart; /* vertical start, registers C5/C6 */
uint16_t vstop; /* vertical total, registers C7/C8 */
uint16_t vsync; /* manual vertical sync start, 80/81 */
uint16_t vtotal; /* number of lines generated, 82/83 */
uint16_t hpos; /* horizontal position + 256, 98/99 */
uint16_t vpos; /* vertical position, 8e/8f */
uint16_t voffs; /* vertical output offset, 9c/9d */
uint16_t hscale; /* horizontal scaling factor, b8/b9 */
uint16_t vscale; /* vertical scaling factor, 10/11 */
u8 sync; /* configuration of the C0 register */
u8 conf; /* configuration register 8 */
u8 syncb; /* configuration register 41 */
u8 dither; /* configuration of the dithering */
u8 pll_a; /* PLL configuration, register A, 1B */
u16 pll_b; /* PLL configuration, register B, 1C/1D */
u16 hstart; /* horizontal start, registers C1/C2 */
u16 hstop; /* horizontal total, registers C3/C4 */
u16 vstart; /* vertical start, registers C5/C6 */
u16 vstop; /* vertical total, registers C7/C8 */
u16 vsync; /* manual vertical sync start, 80/81 */
u16 vtotal; /* number of lines generated, 82/83 */
u16 hpos; /* horizontal position + 256, 98/99 */
u16 vpos; /* vertical position, 8e/8f */
u16 voffs; /* vertical output offset, 9c/9d */
u16 hscale; /* horizontal scaling factor, b8/b9 */
u16 vscale; /* vertical scaling factor, 10/11 */
};

/*
Expand Down Expand Up @@ -389,7 +389,7 @@ struct ns2501_priv {
** If it returns false, it might be wise to enable the
** DVO with the above function.
*/
static bool ns2501_readb(struct intel_dvo_device *dvo, int addr, uint8_t * ch)
static bool ns2501_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
{
struct ns2501_priv *ns = dvo->dev_priv;
struct i2c_adapter *adapter = dvo->i2c_bus;
Expand Down Expand Up @@ -434,11 +434,11 @@ static bool ns2501_readb(struct intel_dvo_device *dvo, int addr, uint8_t * ch)
** If it returns false, it might be wise to enable the
** DVO with the above function.
*/
static bool ns2501_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
static bool ns2501_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
{
struct ns2501_priv *ns = dvo->dev_priv;
struct i2c_adapter *adapter = dvo->i2c_bus;
uint8_t out_buf[2];
u8 out_buf[2];

struct i2c_msg msg = {
.addr = dvo->slave_addr,
Expand Down
10 changes: 5 additions & 5 deletions drivers/gpu/drm/i915/dvo_sil164.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -65,7 +65,7 @@ struct sil164_priv {

#define SILPTR(d) ((SIL164Ptr)(d->DriverPrivate.ptr))

static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
static bool sil164_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
{
struct sil164_priv *sil = dvo->dev_priv;
struct i2c_adapter *adapter = dvo->i2c_bus;
Expand Down Expand Up @@ -102,11 +102,11 @@ static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
return false;
}

static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
{
struct sil164_priv *sil = dvo->dev_priv;
struct i2c_adapter *adapter = dvo->i2c_bus;
uint8_t out_buf[2];
u8 out_buf[2];
struct i2c_msg msg = {
.addr = dvo->slave_addr,
.flags = 0,
Expand Down Expand Up @@ -173,7 +173,7 @@ static bool sil164_init(struct intel_dvo_device *dvo,

static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo)
{
uint8_t reg9;
u8 reg9;

sil164_readb(dvo, SIL164_REG9, &reg9);

Expand Down Expand Up @@ -243,7 +243,7 @@ static bool sil164_get_hw_state(struct intel_dvo_device *dvo)

static void sil164_dump_regs(struct intel_dvo_device *dvo)
{
uint8_t val;
u8 val;

sil164_readb(dvo, SIL164_FREQ_LO, &val);
DRM_DEBUG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
Expand Down
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