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Merge branches 'x86/signal' and 'x86/irq' into perfcounters/core
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Merge these pending x86 tree changes into the perfcounters tree
to avoid conflicts.
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Ingo Molnar committed Dec 8, 2008
3 parents 218d11a + 4217458 + 5b3eec0 commit b5aa97e
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Showing 24 changed files with 1,584 additions and 1,796 deletions.
12 changes: 2 additions & 10 deletions arch/x86/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -242,21 +242,13 @@ config X86_FIND_SMP_CONFIG
def_bool y
depends on X86_MPPARSE || X86_VOYAGER

if ACPI
config X86_MPPARSE
def_bool y
bool "Enable MPS table"
bool "Enable MPS table" if ACPI
default y
depends on X86_LOCAL_APIC
help
For old smp systems that do not have proper acpi support. Newer systems
(esp with 64bit cpus) with acpi support, MADT and DSDT will override it
endif

if !ACPI
config X86_MPPARSE
def_bool y
depends on X86_LOCAL_APIC
endif

choice
prompt "Subarchitecture Type"
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68 changes: 29 additions & 39 deletions arch/x86/ia32/ia32_signal.c
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Original file line number Diff line number Diff line change
Expand Up @@ -197,23 +197,28 @@ struct rt_sigframe
/* fp state follows here */
};

#define COPY(x) { \
unsigned int reg; \
err |= __get_user(reg, &sc->x); \
regs->x = reg; \
#define COPY(x) { \
err |= __get_user(regs->x, &sc->x); \
}

#define RELOAD_SEG(seg,mask) \
{ unsigned int cur; \
unsigned short pre; \
err |= __get_user(pre, &sc->seg); \
savesegment(seg, cur); \
pre |= mask; \
if (pre != cur) loadsegment(seg, pre); }
#define COPY_SEG_CPL3(seg) { \
unsigned short tmp; \
err |= __get_user(tmp, &sc->seg); \
regs->seg = tmp | 3; \
}

#define RELOAD_SEG(seg) { \
unsigned int cur, pre; \
err |= __get_user(pre, &sc->seg); \
savesegment(seg, cur); \
pre |= 3; \
if (pre != cur) \
loadsegment(seg, pre); \
}

static int ia32_restore_sigcontext(struct pt_regs *regs,
struct sigcontext_ia32 __user *sc,
unsigned int *peax)
unsigned int *pax)
{
unsigned int tmpflags, gs, oldgs, err = 0;
void __user *buf;
Expand All @@ -240,18 +245,16 @@ static int ia32_restore_sigcontext(struct pt_regs *regs,
if (gs != oldgs)
load_gs_index(gs);

RELOAD_SEG(fs, 3);
RELOAD_SEG(ds, 3);
RELOAD_SEG(es, 3);
RELOAD_SEG(fs);
RELOAD_SEG(ds);
RELOAD_SEG(es);

COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
COPY(dx); COPY(cx); COPY(ip);
/* Don't touch extended registers */

err |= __get_user(regs->cs, &sc->cs);
regs->cs |= 3;
err |= __get_user(regs->ss, &sc->ss);
regs->ss |= 3;
COPY_SEG_CPL3(cs);
COPY_SEG_CPL3(ss);

err |= __get_user(tmpflags, &sc->flags);
regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
Expand All @@ -262,9 +265,7 @@ static int ia32_restore_sigcontext(struct pt_regs *regs,
buf = compat_ptr(tmp);
err |= restore_i387_xstate_ia32(buf);

err |= __get_user(tmp, &sc->ax);
*peax = tmp;

err |= __get_user(*pax, &sc->ax);
return err;
}

Expand Down Expand Up @@ -359,20 +360,15 @@ static int ia32_setup_sigcontext(struct sigcontext_ia32 __user *sc,
err |= __put_user(regs->dx, &sc->dx);
err |= __put_user(regs->cx, &sc->cx);
err |= __put_user(regs->ax, &sc->ax);
err |= __put_user(regs->cs, &sc->cs);
err |= __put_user(regs->ss, &sc->ss);
err |= __put_user(current->thread.trap_no, &sc->trapno);
err |= __put_user(current->thread.error_code, &sc->err);
err |= __put_user(regs->ip, &sc->ip);
err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs);
err |= __put_user(regs->flags, &sc->flags);
err |= __put_user(regs->sp, &sc->sp_at_signal);
err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss);

tmp = save_i387_xstate_ia32(fpstate);
if (tmp < 0)
err = -EFAULT;
else
err |= __put_user(ptr_to_compat(tmp ? fpstate : NULL),
&sc->fpstate);
err |= __put_user(ptr_to_compat(fpstate), &sc->fpstate);

/* non-iBCS2 extensions.. */
err |= __put_user(mask, &sc->oldmask);
Expand Down Expand Up @@ -408,6 +404,8 @@ static void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
if (used_math()) {
sp = sp - sig_xstate_ia32_size;
*fpstate = (struct _fpstate_ia32 *) sp;
if (save_i387_xstate_ia32(*fpstate) < 0)
return (void __user *) -1L;
}

sp -= frame_size;
Expand All @@ -430,12 +428,10 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka,
u16 poplmovl;
u32 val;
u16 int80;
u16 pad;
} __attribute__((packed)) code = {
0xb858, /* popl %eax ; movl $...,%eax */
__NR_ia32_sigreturn,
0x80cd, /* int $0x80 */
0,
};

frame = get_sigframe(ka, regs, sizeof(*frame), &fpstate);
Expand Down Expand Up @@ -511,8 +507,7 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
u8 movl;
u32 val;
u16 int80;
u16 pad;
u8 pad2;
u8 pad;
} __attribute__((packed)) code = {
0xb8,
__NR_ia32_rt_sigreturn,
Expand Down Expand Up @@ -572,11 +567,6 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
regs->dx = (unsigned long) &frame->info;
regs->cx = (unsigned long) &frame->uc;

/* Make -mregparm=3 work */
regs->ax = sig;
regs->dx = (unsigned long) &frame->info;
regs->cx = (unsigned long) &frame->uc;

loadsegment(ds, __USER32_DS);
loadsegment(es, __USER32_DS);

Expand Down
10 changes: 9 additions & 1 deletion arch/x86/include/asm/bitops.h
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Original file line number Diff line number Diff line change
Expand Up @@ -168,7 +168,15 @@ static inline void __change_bit(int nr, volatile unsigned long *addr)
*/
static inline void change_bit(int nr, volatile unsigned long *addr)
{
asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr));
if (IS_IMMEDIATE(nr)) {
asm volatile(LOCK_PREFIX "xorb %1,%0"
: CONST_MASK_ADDR(nr, addr)
: "iq" ((u8)CONST_MASK(nr)));
} else {
asm volatile(LOCK_PREFIX "btc %1,%0"
: BITOP_ADDR(addr)
: "Ir" (nr));
}
}

/**
Expand Down
74 changes: 29 additions & 45 deletions arch/x86/include/asm/byteorder.h
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Original file line number Diff line number Diff line change
Expand Up @@ -4,26 +4,33 @@
#include <asm/types.h>
#include <linux/compiler.h>

#ifdef __GNUC__
#define __LITTLE_ENDIAN

#ifdef __i386__

static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
{
#ifdef CONFIG_X86_BSWAP
asm("bswap %0" : "=r" (x) : "0" (x));
#else
#ifdef __i386__
# ifdef CONFIG_X86_BSWAP
asm("bswap %0" : "=r" (val) : "0" (val));
# else
asm("xchgb %b0,%h0\n\t" /* swap lower bytes */
"rorl $16,%0\n\t" /* swap words */
"xchgb %b0,%h0" /* swap higher bytes */
: "=q" (x)
: "0" (x));
: "=q" (val)
: "0" (val));
# endif

#else /* __i386__ */
asm("bswapl %0"
: "=r" (val)
: "0" (val));
#endif
return x;
return val;
}
#define __arch_swab32 __arch_swab32

static inline __attribute_const__ __u64 ___arch__swab64(__u64 val)
static inline __attribute_const__ __u64 __arch_swab64(__u64 val)
{
#ifdef __i386__
union {
struct {
__u32 a;
Expand All @@ -32,50 +39,27 @@ static inline __attribute_const__ __u64 ___arch__swab64(__u64 val)
__u64 u;
} v;
v.u = val;
#ifdef CONFIG_X86_BSWAP
# ifdef CONFIG_X86_BSWAP
asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1"
: "=r" (v.s.a), "=r" (v.s.b)
: "0" (v.s.a), "1" (v.s.b));
#else
v.s.a = ___arch__swab32(v.s.a);
v.s.b = ___arch__swab32(v.s.b);
# else
v.s.a = __arch_swab32(v.s.a);
v.s.b = __arch_swab32(v.s.b);
asm("xchgl %0,%1"
: "=r" (v.s.a), "=r" (v.s.b)
: "0" (v.s.a), "1" (v.s.b));
#endif
# endif
return v.u;
}

#else /* __i386__ */

static inline __attribute_const__ __u64 ___arch__swab64(__u64 x)
{
asm("bswapq %0"
: "=r" (x)
: "0" (x));
return x;
}

static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
{
asm("bswapl %0"
: "=r" (x)
: "0" (x));
return x;
}

: "=r" (val)
: "0" (val));
return val;
#endif
}
#define __arch_swab64 __arch_swab64

/* Do not define swab16. Gcc is smart enough to recognize "C" version and
convert it into rotation or exhange. */

#define __arch__swab64(x) ___arch__swab64(x)
#define __arch__swab32(x) ___arch__swab32(x)

#define __BYTEORDER_HAS_U64__

#endif /* __GNUC__ */

#include <linux/byteorder/little_endian.h>
#include <linux/byteorder.h>

#endif /* _ASM_X86_BYTEORDER_H */
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