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x86, mce: factor out duplicated struct mce setup into one function
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Impact: cleanup

This merely factors out duplicated code to set up
the initial struct mce state into a single function.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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Andi Kleen authored and H. Peter Anvin committed Feb 19, 2009
1 parent 0d7482e commit b5f2fa4
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Showing 4 changed files with 18 additions and 14 deletions.
3 changes: 2 additions & 1 deletion arch/x86/include/asm/mce.h
Original file line number Diff line number Diff line change
Expand Up @@ -90,6 +90,7 @@ extern int mce_disabled;

#include <asm/atomic.h>

void mce_setup(struct mce *m);
void mce_log(struct mce *m);
DECLARE_PER_CPU(struct sys_device, device_mce);
extern void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
Expand All @@ -106,7 +107,7 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c);
static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { }
#endif

void mce_log_therm_throt_event(unsigned int cpu, __u64 status);
void mce_log_therm_throt_event(__u64 status);

extern atomic_t mce_entry;

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23 changes: 14 additions & 9 deletions arch/x86/kernel/cpu/mcheck/mce_64.c
Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,14 @@ static char *trigger_argv[2] = { trigger, NULL };

static DECLARE_WAIT_QUEUE_HEAD(mce_wait);

/* Do initial initialization of a struct mce */
void mce_setup(struct mce *m)
{
memset(m, 0, sizeof(struct mce));
m->cpu = smp_processor_id();
rdtscll(m->tsc);
}

/*
* Lockless MCE logging infrastructure.
* This avoids deadlocks on printk locks without having to break locks. Also
Expand Down Expand Up @@ -208,8 +216,8 @@ void do_machine_check(struct pt_regs * regs, long error_code)
|| !banks)
goto out2;

memset(&m, 0, sizeof(struct mce));
m.cpu = smp_processor_id();
mce_setup(&m);

rdmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
/* if the restart IP is not valid, we're done for */
if (!(m.mcgstatus & MCG_STATUS_RIPV))
Expand All @@ -225,7 +233,6 @@ void do_machine_check(struct pt_regs * regs, long error_code)
m.misc = 0;
m.addr = 0;
m.bank = i;
m.tsc = 0;

rdmsrl(MSR_IA32_MC0_STATUS + i*4, m.status);
if ((m.status & MCI_STATUS_VAL) == 0)
Expand All @@ -252,8 +259,8 @@ void do_machine_check(struct pt_regs * regs, long error_code)
rdmsrl(MSR_IA32_MC0_ADDR + i*4, m.addr);

mce_get_rip(&m, regs);
if (error_code >= 0)
rdtscll(m.tsc);
if (error_code < 0)
m.tsc = 0;
if (error_code != -2)
mce_log(&m);

Expand Down Expand Up @@ -341,15 +348,13 @@ void do_machine_check(struct pt_regs * regs, long error_code)
* and historically has been the register value of the
* MSR_IA32_THERMAL_STATUS (Intel) msr.
*/
void mce_log_therm_throt_event(unsigned int cpu, __u64 status)
void mce_log_therm_throt_event(__u64 status)
{
struct mce m;

memset(&m, 0, sizeof(m));
m.cpu = cpu;
mce_setup(&m);
m.bank = MCE_THERMAL_BANK;
m.status = status;
rdtscll(m.tsc);
mce_log(&m);
}
#endif /* CONFIG_X86_MCE_INTEL */
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4 changes: 1 addition & 3 deletions arch/x86/kernel/cpu/mcheck/mce_amd_64.c
Original file line number Diff line number Diff line change
Expand Up @@ -197,9 +197,7 @@ asmlinkage void mce_threshold_interrupt(void)
exit_idle();
irq_enter();

memset(&m, 0, sizeof(m));
rdtscll(m.tsc);
m.cpu = smp_processor_id();
mce_setup(&m);

/* assume first bank caused it */
for (bank = 0; bank < NR_BANKS; ++bank) {
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2 changes: 1 addition & 1 deletion arch/x86/kernel/cpu/mcheck/mce_intel_64.c
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@ asmlinkage void smp_thermal_interrupt(void)

rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
if (therm_throt_process(msr_val & 1))
mce_log_therm_throt_event(smp_processor_id(), msr_val);
mce_log_therm_throt_event(msr_val);

inc_irq_stat(irq_thermal_count);
irq_exit();
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