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HSI: omap_ssi: do not reset module
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module reset and power management rule setup
is already done by hwmod. Remove this cruft,
which predates hwmod.

Signed-off-by: Sebastian Reichel <sre@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Pavel Machek <pavel@ucw.cz>
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Sebastian Reichel committed Jun 27, 2016
1 parent 8c009f1 commit b6616be
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Showing 2 changed files with 1 addition and 20 deletions.
2 changes: 0 additions & 2 deletions drivers/hsi/controllers/omap_ssi.h
Original file line number Diff line number Diff line change
Expand Up @@ -138,7 +138,6 @@ struct gdd_trn {
* @fck_rate: clock rate
* @loss_count: To follow if we need to restore context or not
* @max_speed: Maximum TX speed (Kb/s) set by the clients.
* @sysconfig: SSI controller saved context
* @gdd_gcr: SSI GDD saved context
* @get_loss: Pointer to omap_pm_get_dev_context_loss_count, if any
* @port: Array of pointers of the ports of the controller
Expand All @@ -158,7 +157,6 @@ struct omap_ssi_controller {
u32 loss_count;
u32 max_speed;
/* OMAP SSI Controller context */
u32 sysconfig;
u32 gdd_gcr;
int (*get_loss)(struct device *dev);
struct omap_ssi_port **port;
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19 changes: 1 addition & 18 deletions drivers/hsi/controllers/omap_ssi_core.c
Original file line number Diff line number Diff line change
Expand Up @@ -452,36 +452,19 @@ static int ssi_add_controller(struct hsi_controller *ssi,
static int ssi_hw_init(struct hsi_controller *ssi)
{
struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
unsigned int i;
u32 val;
int err;

err = pm_runtime_get_sync(ssi->device.parent);
if (err < 0) {
dev_err(&ssi->device, "runtime PM failed %d\n", err);
return err;
}
/* Reseting SSI controller */
writel_relaxed(SSI_SOFTRESET, omap_ssi->sys + SSI_SYSCONFIG_REG);
val = readl(omap_ssi->sys + SSI_SYSSTATUS_REG);
for (i = 0; ((i < 20) && !(val & SSI_RESETDONE)); i++) {
msleep(20);
val = readl(omap_ssi->sys + SSI_SYSSTATUS_REG);
}
if (!(val & SSI_RESETDONE)) {
dev_err(&ssi->device, "SSI HW reset failed\n");
pm_runtime_put_sync(ssi->device.parent);
return -EIO;
}
/* Reseting GDD */
writel_relaxed(SSI_SWRESET, omap_ssi->gdd + SSI_GDD_GRST_REG);
/* Get FCK rate in KHz */
omap_ssi->fck_rate = DIV_ROUND_CLOSEST(ssi_get_clk_rate(ssi), 1000);
dev_dbg(&ssi->device, "SSI fck rate %lu KHz\n", omap_ssi->fck_rate);
/* Set default PM settings */
val = SSI_AUTOIDLE | SSI_SIDLEMODE_SMART | SSI_MIDLEMODE_SMART;
writel_relaxed(val, omap_ssi->sys + SSI_SYSCONFIG_REG);
omap_ssi->sysconfig = val;

writel_relaxed(SSI_CLK_AUTOGATING_ON, omap_ssi->sys + SSI_GDD_GCR_REG);
omap_ssi->gdd_gcr = SSI_CLK_AUTOGATING_ON;
pm_runtime_put_sync(ssi->device.parent);
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