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ARM: prima2: convert to common sched_clock() implementation
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Prima2 has its own sched_clock() implementation, which gets in the
way of a single zImage. Moving to the common sched_clock framework
makes the code slightly cleaner (the mapping hack in sched_clock()
goes away...).

Acked-by: Barry Song <baohua.song@csr.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Marc Zyngier committed Feb 3, 2012
1 parent 30c9c5b commit bc8d849
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Showing 2 changed files with 8 additions and 14 deletions.
1 change: 1 addition & 0 deletions arch/arm/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -388,6 +388,7 @@ config ARCH_PRIMA2
select GENERIC_CLOCKEVENTS
select CLKDEV_LOOKUP
select GENERIC_IRQ_CHIP
select HAVE_SCHED_CLOCK
select MIGHT_HAVE_CACHE_L2X0
select USE_OF
select ZONE_DMA
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21 changes: 7 additions & 14 deletions arch/arm/mach-prima2/timer.c
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,7 @@
#include <linux/of.h>
#include <linux/of_address.h>
#include <mach/map.h>
#include <asm/sched_clock.h>
#include <asm/mach/time.h>

#define SIRFSOC_TIMER_COUNTER_LO 0x0000
Expand Down Expand Up @@ -165,21 +166,9 @@ static struct irqaction sirfsoc_timer_irq = {
};

/* Overwrite weak default sched_clock with more precise one */
unsigned long long notrace sched_clock(void)
static u32 notrace sirfsoc_read_sched_clock(void)
{
static int is_mapped;

/*
* sched_clock is called earlier than .init of sys_timer
* if we map timer memory in .init of sys_timer, system
* will panic due to illegal memory access
*/
if (!is_mapped) {
sirfsoc_of_timer_map();
is_mapped = 1;
}

return sirfsoc_timer_read(NULL) * (NSEC_PER_SEC / CLOCK_TICK_RATE);
return (u32)(sirfsoc_timer_read(NULL) & 0xffffffff);
}

static void __init sirfsoc_clockevent_init(void)
Expand Down Expand Up @@ -210,13 +199,17 @@ static void __init sirfsoc_timer_init(void)
BUG_ON(rate < CLOCK_TICK_RATE);
BUG_ON(rate % CLOCK_TICK_RATE);

sirfsoc_of_timer_map();

writel_relaxed(rate / CLOCK_TICK_RATE / 2 - 1, sirfsoc_timer_base + SIRFSOC_TIMER_DIV);
writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO);
writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS);

BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));

setup_sched_clock(sirfsoc_read_sched_clock, 32, CLOCK_TICK_RATE);

BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq));

sirfsoc_clockevent_init();
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