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drm/panel: Add Samsung AMS639RQ08 panel driver
Add the driver for Samsung AMS639RQ08 FHD Plus CMD mode panel support found in: - Xiaomi Mi 9 Lite / CC9 (sdm710-xiaomi-pyxis) - Xiaomi Mi 9T / Redmi K20 (sm7150-xiaomi-davinci) - Xiaomi Mi 9T Pro / Redmi K20 Pro (sm8150-xiaomi-raphael) Tested-by: Degdag Mohamed <degdagmohamed@gmail.com> # xiaomi-raphael Tested-by: Jens Reidel <adrian@travitia.xyz> # xiaomi-davinci Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240930202448.188051-3-danila@jiaxyga.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20240930202448.188051-3-danila@jiaxyga.com
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Danila Tikhonov
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Neil Armstrong
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Oct 9, 2024
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// SPDX-License-Identifier: GPL-2.0-only | ||
/* | ||
* Copyright (c) 2024, Danila Tikhonov <danila@jiaxyga.com> | ||
*/ | ||
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#include <linux/backlight.h> | ||
#include <linux/delay.h> | ||
#include <linux/gpio/consumer.h> | ||
#include <linux/module.h> | ||
#include <linux/of.h> | ||
#include <linux/regulator/consumer.h> | ||
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#include <video/mipi_display.h> | ||
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#include <drm/drm_mipi_dsi.h> | ||
#include <drm/drm_modes.h> | ||
#include <drm/drm_panel.h> | ||
#include <drm/drm_probe_helper.h> | ||
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/* Manufacturer Command Set */ | ||
#define MCS_ACCESS_PROT_OFF 0xb0 | ||
#define MCS_UNKNOWN_B7 0xb7 | ||
#define MCS_BIAS_CURRENT_CTRL 0xd1 | ||
#define MCS_PASSWD1 0xf0 | ||
#define MCS_PASSWD2 0xfc | ||
#define MCS_UNKNOWN_FF 0xff | ||
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struct ams639rq08 { | ||
struct drm_panel panel; | ||
struct mipi_dsi_device *dsi; | ||
struct gpio_desc *reset_gpio; | ||
struct regulator_bulk_data *supplies; | ||
}; | ||
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static const struct regulator_bulk_data ams639rq08_supplies[] = { | ||
{ .supply = "vdd3p3" }, | ||
{ .supply = "vddio" }, | ||
{ .supply = "vsn" }, | ||
{ .supply = "vsp" }, | ||
}; | ||
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static inline struct ams639rq08 *to_ams639rq08(struct drm_panel *panel) | ||
{ | ||
return container_of(panel, struct ams639rq08, panel); | ||
} | ||
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static void ams639rq08_reset(struct ams639rq08 *ctx) | ||
{ | ||
gpiod_set_value_cansleep(ctx->reset_gpio, 1); | ||
usleep_range(1000, 2000); | ||
gpiod_set_value_cansleep(ctx->reset_gpio, 0); | ||
usleep_range(10000, 11000); | ||
} | ||
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static int ams639rq08_on(struct ams639rq08 *ctx) | ||
{ | ||
struct mipi_dsi_device *dsi = ctx->dsi; | ||
struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; | ||
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/* Delay 2ms for VCI1 power */ | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD1, 0x5a, 0x5a); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD2, 0x5a, 0x5a); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_ACCESS_PROT_OFF, 0x0c); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_UNKNOWN_FF, 0x10); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_ACCESS_PROT_OFF, 0x2f); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_BIAS_CURRENT_CTRL, 0x01); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD1, 0xa5, 0xa5); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD2, 0xa5, 0xa5); | ||
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/* Sleep Out */ | ||
mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); | ||
usleep_range(10000, 11000); | ||
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/* TE OUT (Vsync On) */ | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD1, 0x5a, 0x5a); | ||
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mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK); | ||
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/* DBV Smooth Transition */ | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_UNKNOWN_B7, 0x01, 0x4b); | ||
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/* Edge Dimming Speed Setting */ | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_ACCESS_PROT_OFF, 0x06); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_UNKNOWN_B7, 0x10); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD1, 0xa5, 0xa5); | ||
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/* Page Address Set */ | ||
mipi_dsi_dcs_set_page_address_multi(&dsi_ctx, 0x0000, 0x0923); | ||
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD1, 0x5a, 0x5a); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD2, 0x5a, 0x5a); | ||
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/* Set DDIC internal HFP */ | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_ACCESS_PROT_OFF, 0x23); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_BIAS_CURRENT_CTRL, 0x11); | ||
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/* OFC Setting 84.1 Mhz */ | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe9, 0x11, 0x55, | ||
0xa6, 0x75, 0xa3, | ||
0xb9, 0xa1, 0x4a, | ||
0x00, 0x1a, 0xb8); | ||
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/* Err_FG Setting */ | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, | ||
0x00, 0x00, 0x02, | ||
0x02, 0x42, 0x02); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe2, | ||
0x00, 0x00, 0x00, | ||
0x00, 0x00, 0x00); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_ACCESS_PROT_OFF, 0x0c); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0x19); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD1, 0xa5, 0xa5); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD2, 0xa5, 0xa5); | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20); | ||
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/* Brightness Control */ | ||
mipi_dsi_dcs_set_display_brightness_multi(&dsi_ctx, 0x0000); | ||
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/* Display On */ | ||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00); | ||
mipi_dsi_msleep(&dsi_ctx, 67); | ||
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mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); | ||
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return dsi_ctx.accum_err; | ||
} | ||
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static void ams639rq08_off(struct ams639rq08 *ctx) | ||
{ | ||
struct mipi_dsi_device *dsi = ctx->dsi; | ||
struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; | ||
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mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); | ||
mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx); | ||
mipi_dsi_msleep(&dsi_ctx, 120); | ||
} | ||
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static int ams639rq08_prepare(struct drm_panel *panel) | ||
{ | ||
struct ams639rq08 *ctx = to_ams639rq08(panel); | ||
int ret; | ||
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ret = regulator_bulk_enable(ARRAY_SIZE(ams639rq08_supplies), | ||
ctx->supplies); | ||
if (ret < 0) | ||
return ret; | ||
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ams639rq08_reset(ctx); | ||
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ret = ams639rq08_on(ctx); | ||
if (ret < 0) { | ||
gpiod_set_value_cansleep(ctx->reset_gpio, 1); | ||
regulator_bulk_disable(ARRAY_SIZE(ams639rq08_supplies), | ||
ctx->supplies); | ||
return ret; | ||
} | ||
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return 0; | ||
} | ||
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static int ams639rq08_unprepare(struct drm_panel *panel) | ||
{ | ||
struct ams639rq08 *ctx = to_ams639rq08(panel); | ||
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ams639rq08_off(ctx); | ||
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gpiod_set_value_cansleep(ctx->reset_gpio, 1); | ||
regulator_bulk_disable(ARRAY_SIZE(ams639rq08_supplies), | ||
ctx->supplies); | ||
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return 0; | ||
} | ||
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static const struct drm_display_mode ams639rq08_mode = { | ||
.clock = (1080 + 64 + 20 + 64) * (2340 + 64 + 20 + 64) * 60 / 1000, | ||
.hdisplay = 1080, | ||
.hsync_start = 1080 + 64, | ||
.hsync_end = 1080 + 64 + 20, | ||
.htotal = 1080 + 64 + 20 + 64, | ||
.vdisplay = 2340, | ||
.vsync_start = 2340 + 64, | ||
.vsync_end = 2340 + 64 + 20, | ||
.vtotal = 2340 + 64 + 20 + 64, | ||
.width_mm = 68, | ||
.height_mm = 147, | ||
.type = DRM_MODE_TYPE_DRIVER, | ||
}; | ||
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static int ams639rq08_get_modes(struct drm_panel *panel, | ||
struct drm_connector *connector) | ||
{ | ||
return drm_connector_helper_get_modes_fixed(connector, &ams639rq08_mode); | ||
} | ||
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static const struct drm_panel_funcs ams639rq08_panel_funcs = { | ||
.prepare = ams639rq08_prepare, | ||
.unprepare = ams639rq08_unprepare, | ||
.get_modes = ams639rq08_get_modes, | ||
}; | ||
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static int ams639rq08_bl_update_status(struct backlight_device *bl) | ||
{ | ||
struct mipi_dsi_device *dsi = bl_get_data(bl); | ||
u16 brightness = backlight_get_brightness(bl); | ||
int ret; | ||
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dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; | ||
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ret = mipi_dsi_dcs_set_display_brightness_large(dsi, brightness); | ||
if (ret < 0) | ||
return ret; | ||
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dsi->mode_flags |= MIPI_DSI_MODE_LPM; | ||
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return 0; | ||
} | ||
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static int ams639rq08_bl_get_brightness(struct backlight_device *bl) | ||
{ | ||
struct mipi_dsi_device *dsi = bl_get_data(bl); | ||
u16 brightness; | ||
int ret; | ||
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dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; | ||
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ret = mipi_dsi_dcs_get_display_brightness_large(dsi, &brightness); | ||
if (ret < 0) | ||
return ret; | ||
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dsi->mode_flags |= MIPI_DSI_MODE_LPM; | ||
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return brightness; | ||
} | ||
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static const struct backlight_ops ams639rq08_bl_ops = { | ||
.update_status = ams639rq08_bl_update_status, | ||
.get_brightness = ams639rq08_bl_get_brightness, | ||
}; | ||
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static struct backlight_device * | ||
ams639rq08_create_backlight(struct mipi_dsi_device *dsi) | ||
{ | ||
struct device *dev = &dsi->dev; | ||
const struct backlight_properties props = { | ||
.type = BACKLIGHT_RAW, | ||
.brightness = 1023, | ||
.max_brightness = 2047, | ||
}; | ||
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return devm_backlight_device_register(dev, dev_name(dev), dev, dsi, | ||
&ams639rq08_bl_ops, &props); | ||
} | ||
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static int ams639rq08_probe(struct mipi_dsi_device *dsi) | ||
{ | ||
struct device *dev = &dsi->dev; | ||
struct ams639rq08 *ctx; | ||
int ret; | ||
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ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); | ||
if (!ctx) | ||
return -ENOMEM; | ||
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ret = devm_regulator_bulk_get_const(&dsi->dev, | ||
ARRAY_SIZE(ams639rq08_supplies), | ||
ams639rq08_supplies, | ||
&ctx->supplies); | ||
if (ret < 0) | ||
return dev_err_probe(dev, ret, "Failed to get regulators\n"); | ||
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ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); | ||
if (IS_ERR(ctx->reset_gpio)) | ||
return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio), | ||
"Failed to get reset-gpios\n"); | ||
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ctx->dsi = dsi; | ||
mipi_dsi_set_drvdata(dsi, ctx); | ||
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dsi->lanes = 4; | ||
dsi->format = MIPI_DSI_FMT_RGB888; | ||
dsi->mode_flags = MIPI_DSI_MODE_VIDEO_BURST | | ||
MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM; | ||
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drm_panel_init(&ctx->panel, dev, &ams639rq08_panel_funcs, | ||
DRM_MODE_CONNECTOR_DSI); | ||
ctx->panel.prepare_prev_first = true; | ||
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ctx->panel.backlight = ams639rq08_create_backlight(dsi); | ||
if (IS_ERR(ctx->panel.backlight)) | ||
return dev_err_probe(dev, PTR_ERR(ctx->panel.backlight), | ||
"Failed to create backlight\n"); | ||
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drm_panel_add(&ctx->panel); | ||
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ret = devm_mipi_dsi_attach(dev, dsi); | ||
if (ret < 0) { | ||
drm_panel_remove(&ctx->panel); | ||
return dev_err_probe(dev, ret, "Failed to attach to DSI host\n"); | ||
} | ||
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return 0; | ||
} | ||
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static void ams639rq08_remove(struct mipi_dsi_device *dsi) | ||
{ | ||
struct ams639rq08 *ctx = mipi_dsi_get_drvdata(dsi); | ||
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drm_panel_remove(&ctx->panel); | ||
} | ||
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static const struct of_device_id ams639rq08_of_match[] = { | ||
{ .compatible = "samsung,ams639rq08" }, | ||
{ /* sentinel */ } | ||
}; | ||
MODULE_DEVICE_TABLE(of, ams639rq08_of_match); | ||
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static struct mipi_dsi_driver ams639rq08_driver = { | ||
.probe = ams639rq08_probe, | ||
.remove = ams639rq08_remove, | ||
.driver = { | ||
.name = "panel-samsung-ams639rq08", | ||
.of_match_table = ams639rq08_of_match, | ||
}, | ||
}; | ||
module_mipi_dsi_driver(ams639rq08_driver); | ||
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MODULE_AUTHOR("Danila Tikhonov <danila@jiaxyga.com>"); | ||
MODULE_DESCRIPTION("DRM driver for SAMSUNG AMS639RQ08 cmd mode dsi panel"); | ||
MODULE_LICENSE("GPL"); |