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PCI: cadence: Refactor driver to use as a core library
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Cadence PCIe host and endpoint IP may be embedded into a variety of
SoCs/platforms. Let's extract the platform related APIs/Structures in the
current driver to a separate file (pcie-cadence-plat.c), such that the
common functionality can be used by future platforms.

Signed-off-by: Tom Joseph <tjoseph@cadence.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
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Tom Joseph authored and Lorenzo Pieralisi committed Nov 11, 2019
1 parent 54ecb8f commit bd22885
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Showing 6 changed files with 287 additions and 187 deletions.
31 changes: 23 additions & 8 deletions drivers/pci/controller/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -28,23 +28,38 @@ config PCIE_CADENCE
bool

config PCIE_CADENCE_HOST
bool "Cadence PCIe host controller"
bool
depends on OF
depends on PCI
select IRQ_DOMAIN
select PCIE_CADENCE
help
Say Y here if you want to support the Cadence PCIe controller in host
mode. This PCIe controller may be embedded into many different vendors
SoCs.

config PCIE_CADENCE_EP
bool "Cadence PCIe endpoint controller"
bool
depends on OF
depends on PCI_ENDPOINT
select PCIE_CADENCE

config PCIE_CADENCE_PLAT
bool

config PCIE_CADENCE_PLAT_HOST
bool "Cadence PCIe platform host controller"
depends on OF
select PCIE_CADENCE_HOST
select PCIE_CADENCE_PLAT
help
Say Y here if you want to support the Cadence PCIe platform controller in
host mode. This PCIe controller may be embedded into many different
vendors SoCs.

config PCIE_CADENCE_PLAT_EP
bool "Cadence PCIe platform endpoint controller"
depends on OF
depends on PCI_ENDPOINT
select PCIE_CADENCE_EP
select PCIE_CADENCE_PLAT
help
Say Y here if you want to support the Cadence PCIe controller in
Say Y here if you want to support the Cadence PCIe platform controller in
endpoint mode. This PCIe controller may be embedded into many
different vendors SoCs.

Expand Down
1 change: 1 addition & 0 deletions drivers/pci/controller/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@
obj-$(CONFIG_PCIE_CADENCE) += pcie-cadence.o
obj-$(CONFIG_PCIE_CADENCE_HOST) += pcie-cadence-host.o
obj-$(CONFIG_PCIE_CADENCE_EP) += pcie-cadence-ep.o
obj-$(CONFIG_PCIE_CADENCE_PLAT) += pcie-cadence-plat.o
obj-$(CONFIG_PCI_FTPCI100) += pci-ftpci100.o
obj-$(CONFIG_PCI_HYPERV) += pci-hyperv.o
obj-$(CONFIG_PCI_HYPERV_INTERFACE) += pci-hyperv-intf.o
Expand Down
96 changes: 5 additions & 91 deletions drivers/pci/controller/pcie-cadence-ep.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -17,35 +17,6 @@
#define CDNS_PCIE_EP_IRQ_PCI_ADDR_NONE 0x1
#define CDNS_PCIE_EP_IRQ_PCI_ADDR_LEGACY 0x3

/**
* struct cdns_pcie_ep - private data for this PCIe endpoint controller driver
* @pcie: Cadence PCIe controller
* @max_regions: maximum number of regions supported by hardware
* @ob_region_map: bitmask of mapped outbound regions
* @ob_addr: base addresses in the AXI bus where the outbound regions start
* @irq_phys_addr: base address on the AXI bus where the MSI/legacy IRQ
* dedicated outbound regions is mapped.
* @irq_cpu_addr: base address in the CPU space where a write access triggers
* the sending of a memory write (MSI) / normal message (legacy
* IRQ) TLP through the PCIe bus.
* @irq_pci_addr: used to save the current mapping of the MSI/legacy IRQ
* dedicated outbound region.
* @irq_pci_fn: the latest PCI function that has updated the mapping of
* the MSI/legacy IRQ dedicated outbound region.
* @irq_pending: bitmask of asserted legacy IRQs.
*/
struct cdns_pcie_ep {
struct cdns_pcie pcie;
u32 max_regions;
unsigned long ob_region_map;
phys_addr_t *ob_addr;
phys_addr_t irq_phys_addr;
void __iomem *irq_cpu_addr;
u64 irq_pci_addr;
u8 irq_pci_fn;
u8 irq_pending;
};

static int cdns_pcie_ep_write_header(struct pci_epc *epc, u8 fn,
struct pci_epf_header *hdr)
{
Expand Down Expand Up @@ -424,28 +395,17 @@ static const struct pci_epc_ops cdns_pcie_epc_ops = {
.get_features = cdns_pcie_ep_get_features,
};

static const struct of_device_id cdns_pcie_ep_of_match[] = {
{ .compatible = "cdns,cdns-pcie-ep" },

{ },
};

static int cdns_pcie_ep_probe(struct platform_device *pdev)
int cdns_pcie_ep_setup(struct cdns_pcie_ep *ep)
{
struct device *dev = &pdev->dev;
struct device *dev = ep->pcie.dev;
struct platform_device *pdev = to_platform_device(dev);
struct device_node *np = dev->of_node;
struct cdns_pcie_ep *ep;
struct cdns_pcie *pcie;
struct pci_epc *epc;
struct cdns_pcie *pcie = &ep->pcie;
struct resource *res;
struct pci_epc *epc;
int ret;
int phy_count;

ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);
if (!ep)
return -ENOMEM;

pcie = &ep->pcie;
pcie->is_rc = false;

res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "reg");
Expand Down Expand Up @@ -474,19 +434,6 @@ static int cdns_pcie_ep_probe(struct platform_device *pdev)
if (!ep->ob_addr)
return -ENOMEM;

ret = cdns_pcie_init_phy(dev, pcie);
if (ret) {
dev_err(dev, "failed to init phy\n");
return ret;
}
platform_set_drvdata(pdev, pcie);
pm_runtime_enable(dev);
ret = pm_runtime_get_sync(dev);
if (ret < 0) {
dev_err(dev, "pm_runtime_get_sync() failed\n");
goto err_get_sync;
}

/* Disable all but function 0 (anyway BIT(0) is hardwired to 1). */
cdns_pcie_writel(pcie, CDNS_PCIE_LM_EP_FUNC_CFG, BIT(0));

Expand Down Expand Up @@ -528,38 +475,5 @@ static int cdns_pcie_ep_probe(struct platform_device *pdev)
err_init:
pm_runtime_put_sync(dev);

err_get_sync:
pm_runtime_disable(dev);
cdns_pcie_disable_phy(pcie);
phy_count = pcie->phy_count;
while (phy_count--)
device_link_del(pcie->link[phy_count]);

return ret;
}

static void cdns_pcie_ep_shutdown(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct cdns_pcie *pcie = dev_get_drvdata(dev);
int ret;

ret = pm_runtime_put_sync(dev);
if (ret < 0)
dev_dbg(dev, "pm_runtime_put_sync failed\n");

pm_runtime_disable(dev);

cdns_pcie_disable_phy(pcie);
}

static struct platform_driver cdns_pcie_ep_driver = {
.driver = {
.name = "cdns-pcie-ep",
.of_match_table = cdns_pcie_ep_of_match,
.pm = &cdns_pcie_pm_ops,
},
.probe = cdns_pcie_ep_probe,
.shutdown = cdns_pcie_ep_shutdown,
};
builtin_platform_driver(cdns_pcie_ep_driver);
95 changes: 7 additions & 88 deletions drivers/pci/controller/pcie-cadence-host.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -11,33 +11,6 @@

#include "pcie-cadence.h"

/**
* struct cdns_pcie_rc - private data for this PCIe Root Complex driver
* @pcie: Cadence PCIe controller
* @dev: pointer to PCIe device
* @cfg_res: start/end offsets in the physical system memory to map PCI
* configuration space accesses
* @bus_range: first/last buses behind the PCIe host controller
* @cfg_base: IO mapped window to access the PCI configuration space of a
* single function at a time
* @max_regions: maximum number of regions supported by the hardware
* @no_bar_nbits: Number of bits to keep for inbound (PCIe -> CPU) address
* translation (nbits sets into the "no BAR match" register)
* @vendor_id: PCI vendor ID
* @device_id: PCI device ID
*/
struct cdns_pcie_rc {
struct cdns_pcie pcie;
struct device *dev;
struct resource *cfg_res;
struct resource *bus_range;
void __iomem *cfg_base;
u32 max_regions;
u32 no_bar_nbits;
u16 vendor_id;
u16 device_id;
};

static void __iomem *cdns_pci_map_bus(struct pci_bus *bus, unsigned int devfn,
int where)
{
Expand Down Expand Up @@ -92,11 +65,6 @@ static struct pci_ops cdns_pcie_host_ops = {
.write = pci_generic_config_write,
};

static const struct of_device_id cdns_pcie_host_of_match[] = {
{ .compatible = "cdns,cdns-pcie-host" },

{ },
};

static int cdns_pcie_host_init_root_port(struct cdns_pcie_rc *rc)
{
Expand Down Expand Up @@ -136,10 +104,10 @@ static int cdns_pcie_host_init_root_port(struct cdns_pcie_rc *rc)
static int cdns_pcie_host_init_address_translation(struct cdns_pcie_rc *rc)
{
struct cdns_pcie *pcie = &rc->pcie;
struct resource *cfg_res = rc->cfg_res;
struct resource *mem_res = pcie->mem_res;
struct resource *bus_range = rc->bus_range;
struct device *dev = rc->dev;
struct resource *cfg_res = rc->cfg_res;
struct device *dev = pcie->dev;
struct device_node *np = dev->of_node;
struct of_pci_range_parser parser;
struct of_pci_range range;
Expand Down Expand Up @@ -233,25 +201,21 @@ static int cdns_pcie_host_init(struct device *dev,
return err;
}

static int cdns_pcie_host_probe(struct platform_device *pdev)
int cdns_pcie_host_setup(struct cdns_pcie_rc *rc)
{
struct device *dev = &pdev->dev;
struct device *dev = rc->pcie.dev;
struct platform_device *pdev = to_platform_device(dev);
struct device_node *np = dev->of_node;
struct pci_host_bridge *bridge;
struct list_head resources;
struct cdns_pcie_rc *rc;
struct cdns_pcie *pcie;
struct resource *res;
int ret;
int phy_count;

bridge = devm_pci_alloc_host_bridge(dev, sizeof(*rc));
bridge = pci_host_bridge_from_priv(rc);
if (!bridge)
return -ENOMEM;

rc = pci_host_bridge_priv(bridge);
rc->dev = dev;

pcie = &rc->pcie;
pcie->is_rc = true;

Expand Down Expand Up @@ -287,21 +251,8 @@ static int cdns_pcie_host_probe(struct platform_device *pdev)
dev_err(dev, "missing \"mem\"\n");
return -EINVAL;
}
pcie->mem_res = res;

ret = cdns_pcie_init_phy(dev, pcie);
if (ret) {
dev_err(dev, "failed to init phy\n");
return ret;
}
platform_set_drvdata(pdev, pcie);

pm_runtime_enable(dev);
ret = pm_runtime_get_sync(dev);
if (ret < 0) {
dev_err(dev, "pm_runtime_get_sync() failed\n");
goto err_get_sync;
}
pcie->mem_res = res;

ret = cdns_pcie_host_init(dev, &resources, rc);
if (ret)
Expand All @@ -326,37 +277,5 @@ static int cdns_pcie_host_probe(struct platform_device *pdev)
err_init:
pm_runtime_put_sync(dev);

err_get_sync:
pm_runtime_disable(dev);
cdns_pcie_disable_phy(pcie);
phy_count = pcie->phy_count;
while (phy_count--)
device_link_del(pcie->link[phy_count]);

return ret;
}

static void cdns_pcie_shutdown(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct cdns_pcie *pcie = dev_get_drvdata(dev);
int ret;

ret = pm_runtime_put_sync(dev);
if (ret < 0)
dev_dbg(dev, "pm_runtime_put_sync failed\n");

pm_runtime_disable(dev);
cdns_pcie_disable_phy(pcie);
}

static struct platform_driver cdns_pcie_host_driver = {
.driver = {
.name = "cdns-pcie-host",
.of_match_table = cdns_pcie_host_of_match,
.pm = &cdns_pcie_pm_ops,
},
.probe = cdns_pcie_host_probe,
.shutdown = cdns_pcie_shutdown,
};
builtin_platform_driver(cdns_pcie_host_driver);
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