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Merge tag 'omap-for-v4.18/soc-late-signed' of git://git.kernel.org/pu…
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…b/scm/linux/kernel/git/tmlind/linux-omap into next/soc

Late omap soc changes for v4.18 merge window

This series contains two omap1 ams-delta GPIO clean-up patches to get
started with removal of hard-coded GPIO numbers from drivers. And then
the removal of board mach includes from drivers. The second patch mostly
touches the ams-delta audio driver but is included here because of the
removal of the latch gpios and is acked by Mark Brown.

And there are two more am437x related PM patches to save and restore
control module and timer registers for RTC only suspend mode. Looks like
the patch title for the timer changes is a bit misleading, not all the
timer code is yet living under drivers/clocksource. But I had already
pushed out the branch before I noticed this.

* tag 'omap-for-v4.18/soc-late-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  OMAP: CLK: CLKSRC: Add suspend resume hooks
  ARM: AM43XX: Add functions to save/restore am43xx control registers
  ASoC: ams_delta: use GPIO lookup table
  ARM: OMAP1: ams-delta: add GPIO lookup tables

Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson committed May 25, 2018
2 parents 320b857 + 759c27b commit bd6cc4f
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Showing 5 changed files with 328 additions and 22 deletions.
107 changes: 102 additions & 5 deletions arch/arm/mach-omap1/board-ams-delta.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@
* published by the Free Software Foundation.
*/
#include <linux/gpio/driver.h>
#include <linux/gpio/machine.h>
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/init.h>
Expand Down Expand Up @@ -202,7 +203,10 @@ static struct resource latch2_resources[] = {
},
};

#define LATCH2_LABEL "latch2"

static struct bgpio_pdata latch2_pdata = {
.label = LATCH2_LABEL,
.base = AMS_DELTA_LATCH2_GPIO_BASE,
.ngpio = AMS_DELTA_LATCH2_NGPIO,
};
Expand All @@ -217,6 +221,23 @@ static struct platform_device latch2_gpio_device = {
},
};

#define LATCH2_PIN_LCD_VBLEN 0
#define LATCH2_PIN_LCD_NDISP 1
#define LATCH2_PIN_NAND_NCE 2
#define LATCH2_PIN_NAND_NRE 3
#define LATCH2_PIN_NAND_NWP 4
#define LATCH2_PIN_NAND_NWE 5
#define LATCH2_PIN_NAND_ALE 6
#define LATCH2_PIN_NAND_CLE 7
#define LATCH2_PIN_KEYBRD_PWR 8
#define LATCH2_PIN_KEYBRD_DATAOUT 9
#define LATCH2_PIN_SCARD_RSTIN 10
#define LATCH2_PIN_SCARD_CMDVCC 11
#define LATCH2_PIN_MODEM_NRESET 12
#define LATCH2_PIN_MODEM_CODEC 13
#define LATCH2_PIN_HOOKFLASH1 14
#define LATCH2_PIN_HOOKFLASH2 15

static const struct gpio latch_gpios[] __initconst = {
{
.gpio = LATCH1_GPIO_BASE + 6,
Expand All @@ -238,11 +259,6 @@ static const struct gpio latch_gpios[] __initconst = {
.flags = GPIOF_OUT_INIT_LOW,
.label = "scard_cmdvcc",
},
{
.gpio = AMS_DELTA_GPIO_PIN_MODEM_CODEC,
.flags = GPIOF_OUT_INIT_LOW,
.label = "modem_codec",
},
{
.gpio = AMS_DELTA_LATCH2_GPIO_BASE + 14,
.flags = GPIOF_OUT_INIT_LOW,
Expand Down Expand Up @@ -323,6 +339,22 @@ static struct platform_device ams_delta_nand_device = {
.resource = ams_delta_nand_resources,
};

#define OMAP_GPIO_LABEL "gpio-0-15"

static struct gpiod_lookup_table ams_delta_nand_gpio_table = {
.table = {
GPIO_LOOKUP(OMAP_GPIO_LABEL, AMS_DELTA_GPIO_PIN_NAND_RB, "rdy",
0),
GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_NCE, "nce", 0),
GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_NRE, "nre", 0),
GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_NWP, "nwp", 0),
GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_NWE, "nwe", 0),
GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_ALE, "ale", 0),
GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_CLE, "cle", 0),
{ },
},
};

static struct resource ams_delta_kp_resources[] = {
[0] = {
.start = INT_KEYBOARD,
Expand Down Expand Up @@ -358,6 +390,14 @@ static struct platform_device ams_delta_lcd_device = {
.id = -1,
};

static struct gpiod_lookup_table ams_delta_lcd_gpio_table = {
.table = {
GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_LCD_VBLEN, "vblen", 0),
GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_LCD_NDISP, "ndisp", 0),
{ },
},
};

static const struct gpio_led gpio_leds[] __initconst = {
{
.name = "camera",
Expand Down Expand Up @@ -449,11 +489,35 @@ static struct platform_device ams_delta_audio_device = {
.id = -1,
};

static struct gpiod_lookup_table ams_delta_audio_gpio_table = {
.table = {
GPIO_LOOKUP(OMAP_GPIO_LABEL, AMS_DELTA_GPIO_PIN_HOOK_SWITCH,
"hook_switch", 0),
GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_MODEM_CODEC,
"modem_codec", 0),
{ },
},
};

static struct platform_device cx20442_codec_device = {
.name = "cx20442-codec",
.id = -1,
};

static struct gpiod_lookup_table ams_delta_serio_gpio_table = {
.table = {
GPIO_LOOKUP(OMAP_GPIO_LABEL, AMS_DELTA_GPIO_PIN_KEYBRD_DATA,
"data", 0),
GPIO_LOOKUP(OMAP_GPIO_LABEL, AMS_DELTA_GPIO_PIN_KEYBRD_CLK,
"clock", 0),
GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_KEYBRD_PWR,
"power", 0),
GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_KEYBRD_DATAOUT,
"dataout", 0),
{ },
},
};

static struct platform_device *ams_delta_devices[] __initdata = {
&latch1_gpio_device,
&latch2_gpio_device,
Expand All @@ -468,6 +532,16 @@ static struct platform_device *late_devices[] __initdata = {
&cx20442_codec_device,
};

static struct gpiod_lookup_table *ams_delta_gpio_tables[] __initdata = {
&ams_delta_audio_gpio_table,
&ams_delta_serio_gpio_table,
};

static struct gpiod_lookup_table *late_gpio_tables[] __initdata = {
&ams_delta_lcd_gpio_table,
&ams_delta_nand_gpio_table,
};

static void __init ams_delta_init(void)
{
/* mux pins for uarts */
Expand Down Expand Up @@ -500,6 +574,20 @@ static void __init ams_delta_init(void)
gpio_led_register_device(-1, &leds_pdata);
platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));

/*
* As soon as devices have been registered, assign their dev_names
* to respective GPIO lookup tables before they are added.
*/
ams_delta_audio_gpio_table.dev_id =
dev_name(&ams_delta_audio_device.dev);
/*
* No device name is assigned to GPIO lookup table for serio device
* as long as serio driver is not converted to platform device driver.
*/

gpiod_add_lookup_tables(ams_delta_gpio_tables,
ARRAY_SIZE(ams_delta_gpio_tables));

ams_delta_init_fiq();

omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1);
Expand Down Expand Up @@ -570,6 +658,15 @@ static int __init late_init(void)

platform_add_devices(late_devices, ARRAY_SIZE(late_devices));

/*
* As soon as devices have been registered, assign their dev_names
* to respective GPIO lookup tables before they are added.
*/
ams_delta_lcd_gpio_table.dev_id = dev_name(&ams_delta_lcd_device.dev);
ams_delta_nand_gpio_table.dev_id = dev_name(&ams_delta_nand_device.dev);

gpiod_add_lookup_tables(late_gpio_tables, ARRAY_SIZE(late_gpio_tables));

err = platform_device_register(&modem_nreset_device);
if (err) {
pr_err("Couldn't register the modem regulator device\n");
Expand Down
112 changes: 112 additions & 0 deletions arch/arm/mach-omap2/control.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@
#include <linux/of_address.h>
#include <linux/regmap.h>
#include <linux/mfd/syscon.h>
#include <linux/cpu_pm.h>

#include "soc.h"
#include "iomap.h"
Expand Down Expand Up @@ -621,6 +622,110 @@ void __init omap3_ctrl_init(void)
}
#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */

static unsigned long am43xx_control_reg_offsets[] = {
AM33XX_CONTROL_SYSCONFIG_OFFSET,
AM33XX_CONTROL_STATUS_OFFSET,
AM43XX_CONTROL_MPU_L2_CTRL_OFFSET,
AM33XX_CONTROL_CORE_SLDO_CTRL_OFFSET,
AM33XX_CONTROL_MPU_SLDO_CTRL_OFFSET,
AM33XX_CONTROL_CLK32KDIVRATIO_CTRL_OFFSET,
AM33XX_CONTROL_BANDGAP_CTRL_OFFSET,
AM33XX_CONTROL_BANDGAP_TRIM_OFFSET,
AM33XX_CONTROL_PLL_CLKINPULOW_CTRL_OFFSET,
AM33XX_CONTROL_MOSC_CTRL_OFFSET,
AM33XX_CONTROL_DEEPSLEEP_CTRL_OFFSET,
AM43XX_CONTROL_DISPLAY_PLL_SEL_OFFSET,
AM33XX_CONTROL_INIT_PRIORITY_0_OFFSET,
AM33XX_CONTROL_INIT_PRIORITY_1_OFFSET,
AM33XX_CONTROL_TPTC_CFG_OFFSET,
AM33XX_CONTROL_USB_CTRL0_OFFSET,
AM33XX_CONTROL_USB_CTRL1_OFFSET,
AM43XX_CONTROL_USB_CTRL2_OFFSET,
AM43XX_CONTROL_GMII_SEL_OFFSET,
AM43XX_CONTROL_MPUSS_CTRL_OFFSET,
AM43XX_CONTROL_TIMER_CASCADE_CTRL_OFFSET,
AM43XX_CONTROL_PWMSS_CTRL_OFFSET,
AM33XX_CONTROL_MREQPRIO_0_OFFSET,
AM33XX_CONTROL_MREQPRIO_1_OFFSET,
AM33XX_CONTROL_HW_EVENT_SEL_GRP1_OFFSET,
AM33XX_CONTROL_HW_EVENT_SEL_GRP2_OFFSET,
AM33XX_CONTROL_HW_EVENT_SEL_GRP3_OFFSET,
AM33XX_CONTROL_HW_EVENT_SEL_GRP4_OFFSET,
AM33XX_CONTROL_SMRT_CTRL_OFFSET,
AM33XX_CONTROL_MPUSS_HW_DEBUG_SEL_OFFSET,
AM43XX_CONTROL_CQDETECT_STS_OFFSET,
AM43XX_CONTROL_CQDETECT_STS2_OFFSET,
AM43XX_CONTROL_VTP_CTRL_OFFSET,
AM33XX_CONTROL_VREF_CTRL_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_0_3_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_4_7_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_8_11_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_12_15_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_16_19_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_20_23_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_24_27_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_28_31_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_32_35_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_36_39_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_40_43_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_44_47_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_48_51_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_52_55_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_56_59_OFFSET,
AM33XX_CONTROL_TPCC_EVT_MUX_60_63_OFFSET,
AM33XX_CONTROL_TIMER_EVT_CAPT_OFFSET,
AM33XX_CONTROL_ECAP_EVT_CAPT_OFFSET,
AM33XX_CONTROL_ADC_EVT_CAPT_OFFSET,
AM43XX_CONTROL_ADC1_EVT_CAPT_OFFSET,
AM33XX_CONTROL_RESET_ISO_OFFSET,
};

static u32 am33xx_control_vals[ARRAY_SIZE(am43xx_control_reg_offsets)];

/**
* am43xx_control_save_context - Save the wakeup domain registers
*
* Save the wkup domain registers
*/
void am43xx_control_save_context(void)
{
int i;

for (i = 0; i < ARRAY_SIZE(am43xx_control_reg_offsets); i++)
am33xx_control_vals[i] =
omap_ctrl_readl(am43xx_control_reg_offsets[i]);
}

/**
* am43xx_control_restore_context - Restore the wakeup domain registers
*
* Restore the wkup domain registers
*/
void am43xx_control_restore_context(void)
{
int i;

for (i = 0; i < ARRAY_SIZE(am43xx_control_reg_offsets); i++)
omap_ctrl_writel(am33xx_control_vals[i],
am43xx_control_reg_offsets[i]);
}

static int cpu_notifier(struct notifier_block *nb, unsigned long cmd, void *v)
{
switch (cmd) {
case CPU_CLUSTER_PM_ENTER:
if (enable_off_mode)
am43xx_control_save_context();
break;
case CPU_CLUSTER_PM_EXIT:
if (enable_off_mode)
am43xx_control_restore_context();
break;
}

return NOTIFY_OK;
}

struct control_init_data {
int index;
void __iomem *mem;
Expand Down Expand Up @@ -699,6 +804,7 @@ int __init omap_control_init(void)
const struct omap_prcm_init_data *data;
int ret;
struct regmap *syscon;
static struct notifier_block nb;

for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) {
data = match->data;
Expand Down Expand Up @@ -731,6 +837,12 @@ int __init omap_control_init(void)
}
}

/* Only AM43XX can lose ctrl registers context during rtc-ddr suspend */
if (soc_is_am43xx()) {
nb.notifier_call = cpu_notifier;
cpu_pm_register_notifier(&nb);
}

return 0;
}

Expand Down
61 changes: 61 additions & 0 deletions arch/arm/mach-omap2/control.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -409,6 +409,67 @@
#define AM33XX_DEV_FEATURE 0x604
#define AM33XX_SGX_MASK BIT(29)

/* Additional AM33XX/AM43XX CONTROL registers */
#define AM33XX_CONTROL_SYSCONFIG_OFFSET 0x0010
#define AM33XX_CONTROL_STATUS_OFFSET 0x0040
#define AM43XX_CONTROL_MPU_L2_CTRL_OFFSET 0x01e0
#define AM33XX_CONTROL_CORTEX_VBBLDO_CTRL_OFFSET 0x041c
#define AM33XX_CONTROL_CORE_SLDO_CTRL_OFFSET 0x0428
#define AM33XX_CONTROL_MPU_SLDO_CTRL_OFFSET 0x042c
#define AM33XX_CONTROL_CLK32KDIVRATIO_CTRL_OFFSET 0x0444
#define AM33XX_CONTROL_BANDGAP_CTRL_OFFSET 0x0448
#define AM33XX_CONTROL_BANDGAP_TRIM_OFFSET 0x044c
#define AM33XX_CONTROL_PLL_CLKINPULOW_CTRL_OFFSET 0x0458
#define AM33XX_CONTROL_MOSC_CTRL_OFFSET 0x0468
#define AM33XX_CONTROL_RCOSC_CTRL_OFFSET 0x046c
#define AM33XX_CONTROL_DEEPSLEEP_CTRL_OFFSET 0x0470
#define AM43XX_CONTROL_DISPLAY_PLL_SEL_OFFSET 0x0534
#define AM33XX_CONTROL_INIT_PRIORITY_0_OFFSET 0x0608
#define AM33XX_CONTROL_INIT_PRIORITY_1_OFFSET 0x060c
#define AM33XX_CONTROL_MMU_CFG_OFFSET 0x0610
#define AM33XX_CONTROL_TPTC_CFG_OFFSET 0x0614
#define AM33XX_CONTROL_USB_CTRL0_OFFSET 0x0620
#define AM33XX_CONTROL_USB_CTRL1_OFFSET 0x0628
#define AM33XX_CONTROL_USB_WKUP_CTRL_OFFSET 0x0648
#define AM43XX_CONTROL_USB_CTRL2_OFFSET 0x064c
#define AM43XX_CONTROL_GMII_SEL_OFFSET 0x0650
#define AM43XX_CONTROL_MPUSS_CTRL_OFFSET 0x0654
#define AM43XX_CONTROL_TIMER_CASCADE_CTRL_OFFSET 0x0658
#define AM43XX_CONTROL_PWMSS_CTRL_OFFSET 0x0664
#define AM33XX_CONTROL_MREQPRIO_0_OFFSET 0x0670
#define AM33XX_CONTROL_MREQPRIO_1_OFFSET 0x0674
#define AM33XX_CONTROL_HW_EVENT_SEL_GRP1_OFFSET 0x0690
#define AM33XX_CONTROL_HW_EVENT_SEL_GRP2_OFFSET 0x0694
#define AM33XX_CONTROL_HW_EVENT_SEL_GRP3_OFFSET 0x0698
#define AM33XX_CONTROL_HW_EVENT_SEL_GRP4_OFFSET 0x069c
#define AM33XX_CONTROL_SMRT_CTRL_OFFSET 0x06a0
#define AM33XX_CONTROL_MPUSS_HW_DEBUG_SEL_OFFSET 0x06a4
#define AM43XX_CONTROL_CQDETECT_STS_OFFSET 0x0e00
#define AM43XX_CONTROL_CQDETECT_STS2_OFFSET 0x0e08
#define AM43XX_CONTROL_VTP_CTRL_OFFSET 0x0e0c
#define AM33XX_CONTROL_VREF_CTRL_OFFSET 0x0e14
#define AM33XX_CONTROL_TPCC_EVT_MUX_0_3_OFFSET 0x0f90
#define AM33XX_CONTROL_TPCC_EVT_MUX_4_7_OFFSET 0x0f94
#define AM33XX_CONTROL_TPCC_EVT_MUX_8_11_OFFSET 0x0f98
#define AM33XX_CONTROL_TPCC_EVT_MUX_12_15_OFFSET 0x0f9c
#define AM33XX_CONTROL_TPCC_EVT_MUX_16_19_OFFSET 0x0fa0
#define AM33XX_CONTROL_TPCC_EVT_MUX_20_23_OFFSET 0x0fa4
#define AM33XX_CONTROL_TPCC_EVT_MUX_24_27_OFFSET 0x0fa8
#define AM33XX_CONTROL_TPCC_EVT_MUX_28_31_OFFSET 0x0fac
#define AM33XX_CONTROL_TPCC_EVT_MUX_32_35_OFFSET 0x0fb0
#define AM33XX_CONTROL_TPCC_EVT_MUX_36_39_OFFSET 0x0fb4
#define AM33XX_CONTROL_TPCC_EVT_MUX_40_43_OFFSET 0x0fb8
#define AM33XX_CONTROL_TPCC_EVT_MUX_44_47_OFFSET 0x0fbc
#define AM33XX_CONTROL_TPCC_EVT_MUX_48_51_OFFSET 0x0fc0
#define AM33XX_CONTROL_TPCC_EVT_MUX_52_55_OFFSET 0x0fc4
#define AM33XX_CONTROL_TPCC_EVT_MUX_56_59_OFFSET 0x0fc8
#define AM33XX_CONTROL_TPCC_EVT_MUX_60_63_OFFSET 0x0fcc
#define AM33XX_CONTROL_TIMER_EVT_CAPT_OFFSET 0x0fd0
#define AM33XX_CONTROL_ECAP_EVT_CAPT_OFFSET 0x0fd4
#define AM33XX_CONTROL_ADC_EVT_CAPT_OFFSET 0x0fd8
#define AM43XX_CONTROL_ADC1_EVT_CAPT_OFFSET 0x0fdc
#define AM33XX_CONTROL_RESET_ISO_OFFSET 0x1000

/* CONTROL OMAP STATUS register to identify OMAP3 features */
#define OMAP3_CONTROL_OMAP_STATUS 0x044c

Expand Down
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