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net: phy: aquantia: clear PMD Global Transmit Disable bit during init
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PMD Global Transmit Disable bit should be cleared for normal operation.
This should be HW default, however I found that on Asus RT-AX89X that uses
AQR113C PHY and firmware 5.4 this bit is set by default.

With this bit set the AQR cannot achieve a link with its link-partner and
it took me multiple hours of digging through the vendor GPL source to find
this out, so lets always clear this bit during .config_init() to avoid a
situation like this in the future.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20240211181732.646311-1-robimarko@gmail.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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Robert Marko authored and Paolo Abeni committed Feb 13, 2024
1 parent 32c7eec commit bed90b0
Showing 1 changed file with 9 additions and 0 deletions.
9 changes: 9 additions & 0 deletions drivers/net/phy/aquantia/aquantia_main.c
Original file line number Diff line number Diff line change
Expand Up @@ -727,6 +727,15 @@ static int aqr113c_config_init(struct phy_device *phydev)
if (ret < 0)
return ret;

ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS,
MDIO_PMD_TXDIS_GLOBAL);
if (ret)
return ret;

ret = aqr107_wait_processor_intensive_op(phydev);
if (ret)
return ret;

return aqr107_fill_interface_modes(phydev);
}

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