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drm/xe: Initialize GuC earlier during probe
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SR-IOV VF has limited access to MMIO registers. Fortunately, it is able
to access a curated subset that is needed to initialize the driver by
communicating with SR-IOV PF using GuC CT.
Initialize GuC earlier in order to keep the unified probe ordering
between VF and PF modes.

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240219130530.1406044-4-michal.winiarski@intel.com
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Michał Winiarski authored and Rodrigo Vivi committed Feb 20, 2024
1 parent 8a4587e commit bf8ec3c
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Showing 4 changed files with 54 additions and 20 deletions.
6 changes: 6 additions & 0 deletions drivers/gpu/drm/xe/xe_device.c
Original file line number Diff line number Diff line change
Expand Up @@ -463,6 +463,12 @@ int xe_device_probe(struct xe_device *xe)
}
}

for_each_gt(gt, xe, id) {
err = xe_gt_init_hwconfig(gt);
if (err)
return err;
}

err = drmm_add_action_or_reset(&xe->drm, xe_driver_flr_fini, xe);
if (err)
return err;
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57 changes: 39 additions & 18 deletions drivers/gpu/drm/xe/xe_gt.c
Original file line number Diff line number Diff line change
Expand Up @@ -315,7 +315,6 @@ int xe_gt_init_early(struct xe_gt *gt)
return err;

xe_gt_topology_init(gt);
xe_gt_mcr_init(gt);

err = xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
if (err)
Expand Down Expand Up @@ -354,8 +353,6 @@ static int gt_fw_domain_init(struct xe_gt *gt)
if (err)
goto err_hw_fence_irq;

xe_pat_init(gt);

if (!xe_gt_is_media_type(gt)) {
err = xe_ggtt_init(gt_to_tile(gt)->mem.ggtt);
if (err)
Expand All @@ -364,19 +361,8 @@ static int gt_fw_domain_init(struct xe_gt *gt)
xe_lmtt_init(&gt_to_tile(gt)->sriov.pf.lmtt);
}

err = xe_uc_init(&gt->uc);
if (err)
goto err_force_wake;

err = xe_uc_init_hwconfig(&gt->uc);
if (err)
goto err_force_wake;

xe_gt_idle_sysfs_init(&gt->gtidle);

/* XXX: Fake that we pull the engine mask from hwconfig blob */
gt->info.engine_mask = gt->info.__engine_mask;

/* Enable per hw engine IRQs */
xe_irq_enable_hwe(gt);

Expand Down Expand Up @@ -444,10 +430,6 @@ static int all_fw_domain_init(struct xe_gt *gt)
if (err)
goto err_force_wake;

err = xe_uc_init_post_hwconfig(&gt->uc);
if (err)
goto err_force_wake;

if (!xe_gt_is_media_type(gt)) {
/*
* USM has its only SA pool to non-block behind user operations
Expand All @@ -474,6 +456,10 @@ static int all_fw_domain_init(struct xe_gt *gt)
}
}

err = xe_uc_init_post_hwconfig(&gt->uc);
if (err)
goto err_force_wake;

err = xe_uc_init_hw(&gt->uc);
if (err)
goto err_force_wake;
Expand Down Expand Up @@ -503,6 +489,41 @@ static int all_fw_domain_init(struct xe_gt *gt)
return err;
}

/*
* Initialize enough GT to be able to load GuC in order to obtain hwconfig and
* enable CTB communication.
*/
int xe_gt_init_hwconfig(struct xe_gt *gt)
{
int err;

xe_device_mem_access_get(gt_to_xe(gt));
err = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
if (err)
goto out;

xe_gt_mcr_init(gt);
xe_pat_init(gt);

err = xe_uc_init(&gt->uc);
if (err)
goto out_fw;

err = xe_uc_init_hwconfig(&gt->uc);
if (err)
goto out_fw;

/* XXX: Fake that we pull the engine mask from hwconfig blob */
gt->info.engine_mask = gt->info.__engine_mask;

out_fw:
xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
out:
xe_device_mem_access_put(gt_to_xe(gt));

return err;
}

int xe_gt_init(struct xe_gt *gt)
{
int err;
Expand Down
1 change: 1 addition & 0 deletions drivers/gpu/drm/xe/xe_gt.h
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,7 @@ static inline bool xe_fault_inject_gt_reset(void)
#endif

struct xe_gt *xe_gt_alloc(struct xe_tile *tile);
int xe_gt_init_hwconfig(struct xe_gt *gt);
int xe_gt_init_early(struct xe_gt *gt);
int xe_gt_init(struct xe_gt *gt);
int xe_gt_record_default_lrcs(struct xe_gt *gt);
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10 changes: 8 additions & 2 deletions drivers/gpu/drm/xe/xe_uc.c
Original file line number Diff line number Diff line change
Expand Up @@ -32,13 +32,15 @@ uc_to_xe(struct xe_uc *uc)
/* Should be called once at driver load only */
int xe_uc_init(struct xe_uc *uc)
{
struct xe_device *xe = uc_to_xe(uc);
int ret;

xe_device_mem_access_get(xe);

/*
* We call the GuC/HuC/GSC init functions even if GuC submission is off
* to correctly move our tracking of the FW state to "disabled".
*/

ret = xe_guc_init(&uc->guc);
if (ret)
goto err;
Expand All @@ -52,7 +54,7 @@ int xe_uc_init(struct xe_uc *uc)
goto err;

if (!xe_device_uc_enabled(uc_to_xe(uc)))
return 0;
goto err;

ret = xe_wopcm_init(&uc->wopcm);
if (ret)
Expand All @@ -66,9 +68,13 @@ int xe_uc_init(struct xe_uc *uc)
if (ret)
goto err;

xe_device_mem_access_put(xe);

return 0;

err:
xe_device_mem_access_put(xe);

return ret;
}

Expand Down

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