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Merge tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kerne…
…l/git/khilman/linux-amlogic into arm/fixes Amlogic fixes for v5.8-rc - misc DT fixes, and SoC ID fixes * tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson: Align L2 cache-controller nodename with dtschema arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency arm64: dts: meson: add missing gxl rng clock soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's Link: https://lore.kernel.org/r/7hk0zc1ujc.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
/* | ||
* Copyright (c) 2020 BayLibre SAS | ||
* Author: Neil Armstrong <narmstrong@baylibre.com> | ||
*/ | ||
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#include "meson-gxl-s905x.dtsi" | ||
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/ { | ||
compatible = "amlogic,s805x", "amlogic,meson-gxl"; | ||
}; | ||
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/* The S805X Package doesn't seem to handle the 744MHz OPP correctly */ | ||
&mali { | ||
assigned-clocks = <&clkc CLKID_MALI_0_SEL>, | ||
<&clkc CLKID_MALI_0>, | ||
<&clkc CLKID_MALI>; /* Glitch free mux */ | ||
assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, | ||
<0>, /* Do Nothing */ | ||
<&clkc CLKID_MALI_0>; | ||
assigned-clock-rates = <0>, /* Do Nothing */ | ||
<666666666>, | ||
<0>; /* Do Nothing */ | ||
}; |
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