Skip to content

Commit

Permalink
ARM: dts: qcom: sdx55: fix IPA interconnect definitions
Browse files Browse the repository at this point in the history
The first two interconnects defined for IPA on the SDX55 SoC are
really two parts of what should be represented as a single path
between IPA and system memory.

Fix this by combining the "memory-a" and "memory-b" interconnects
into a single "memory" interconnect.

Reported-by: David Heidelberg <david@ixit.cz>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
  • Loading branch information
Alex Elder authored and David S. Miller committed Dec 13, 2021
1 parent cec1605 commit c0d6316
Showing 1 changed file with 2 additions and 4 deletions.
6 changes: 2 additions & 4 deletions arch/arm/boot/dts/qcom-sdx55.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -333,12 +333,10 @@
clocks = <&rpmhcc RPMH_IPA_CLK>;
clock-names = "core";

interconnects = <&system_noc MASTER_IPA &system_noc SLAVE_SNOC_MEM_NOC_GC>,
<&mem_noc MASTER_SNOC_GC_MEM_NOC &mc_virt SLAVE_EBI_CH0>,
interconnects = <&system_noc MASTER_IPA &mc_virt SLAVE_EBI_CH0>,
<&system_noc MASTER_IPA &system_noc SLAVE_OCIMEM>,
<&mem_noc MASTER_AMPSS_M0 &system_noc SLAVE_IPA_CFG>;
interconnect-names = "memory-a",
"memory-b",
interconnect-names = "memory",
"imem",
"config";

Expand Down

0 comments on commit c0d6316

Please sign in to comment.