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clk: qcom: Skip halt checks on gcc_pcie_0_pipe_clk for 8998
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See similar issue solved by commit 5f2420e
("clk: qcom: Skip halt checks on gcc_usb3_phy_pipe_clk for 8998")

Without this patch, PCIe PHY init fails:

qcom-qmp-phy 1c06000.phy: pipe_clk enable failed err=-16
phy phy-1c06000.phy.0: phy init failed --> -16

Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
Fixes: b5f5f52 ("clk: qcom: Add MSM8998 Global Clock Control (GCC) driver")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Marc Gonzalez authored and Stephen Boyd committed Apr 11, 2019
1 parent 892df01 commit c0ee0e4
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion drivers/clk/qcom/gcc-msm8998.c
Original file line number Diff line number Diff line change
Expand Up @@ -2161,7 +2161,7 @@ static struct clk_branch gcc_pcie_0_mstr_axi_clk = {

static struct clk_branch gcc_pcie_0_pipe_clk = {
.halt_reg = 0x6b018,
.halt_check = BRANCH_HALT,
.halt_check = BRANCH_HALT_SKIP,
.clkr = {
.enable_reg = 0x6b018,
.enable_mask = BIT(0),
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