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MediaTek High-Speed DMA Controller | ||
================================== | ||
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This device follows the generic DMA bindings defined in dma/dma.txt. | ||
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Required properties: | ||
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- compatible: Must be one of | ||
"mediatek,mt7622-hsdma": for MT7622 SoC | ||
"mediatek,mt7623-hsdma": for MT7623 SoC | ||
- reg: Should contain the register's base address and length. | ||
- interrupts: Should contain a reference to the interrupt used by this | ||
device. | ||
- clocks: Should be the clock specifiers corresponding to the entry in | ||
clock-names property. | ||
- clock-names: Should contain "hsdma" entries. | ||
- power-domains: Phandle to the power domain that the device is part of | ||
- #dma-cells: The length of the DMA specifier, must be <1>. This one cell | ||
in dmas property of a client device represents the channel | ||
number. | ||
Example: | ||
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hsdma: dma-controller@1b007000 { | ||
compatible = "mediatek,mt7623-hsdma"; | ||
reg = <0 0x1b007000 0 0x1000>; | ||
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>; | ||
clocks = <ðsys CLK_ETHSYS_HSDMA>; | ||
clock-names = "hsdma"; | ||
power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; | ||
#dma-cells = <1>; | ||
}; | ||
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DMA clients must use the format described in dma/dma.txt file. |
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config MTK_HSDMA | ||
tristate "MediaTek High-Speed DMA controller support" | ||
depends on ARCH_MEDIATEK || COMPILE_TEST | ||
select DMA_ENGINE | ||
select DMA_VIRTUAL_CHANNELS | ||
---help--- | ||
Enable support for High-Speed DMA controller on MediaTek | ||
SoCs. | ||
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This controller provides the channels which is dedicated to | ||
memory-to-memory transfer to offload from CPU through ring- | ||
based descriptor management. |
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obj-$(CONFIG_MTK_HSDMA) += mtk-hsdma.o |
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