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drm/msm/dpu: Fix slice_last_group_size calculation
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Correct the math for slice_last_group_size so that it matches the
calculations downstream.

Fixes: c110cfd ("drm/msm/disp/dpu1: Add support for DSC")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/539269/
Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-7-bafc7be95691@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Jessica Zhang authored and Dmitry Baryshkov committed Jun 15, 2023
1 parent 4434619 commit c223059
Showing 1 changed file with 3 additions and 2 deletions.
5 changes: 3 additions & 2 deletions drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
Original file line number Diff line number Diff line change
@@ -56,9 +56,10 @@ static void dpu_hw_dsc_config(struct dpu_hw_dsc *hw_dsc,
if (is_cmd_mode)
initial_lines += 1;

slice_last_group_size = 3 - (dsc->slice_width % 3);
slice_last_group_size = (dsc->slice_width + 2) % 3;

data = (initial_lines << 20);
data |= ((slice_last_group_size - 1) << 18);
data |= (slice_last_group_size << 18);
/* bpp is 6.4 format, 4 LSBs bits are for fractional part */
data |= (dsc->bits_per_pixel << 8);
data |= (dsc->block_pred_enable << 7);

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