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scsi: ufs: exynos: Allow max frequencies up to 267Mhz
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Platforms such as Tensor gs101 the pclk frequency is 267Mhz.  Increase
PCLK_AVAIL_MAX so we don't fail the frequency check.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20240426122004.2249178-5-peter.griffin@linaro.org
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Will McVicker <willmcvicker@google.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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Peter Griffin authored and Martin K. Petersen committed May 7, 2024
1 parent 9238cad commit c9deb9a
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion drivers/ufs/host/ufs-exynos.h
Original file line number Diff line number Diff line change
Expand Up @@ -116,7 +116,7 @@ struct exynos_ufs;
#define PA_HIBERN8TIME_VAL 0x20

#define PCLK_AVAIL_MIN 70000000
#define PCLK_AVAIL_MAX 167000000
#define PCLK_AVAIL_MAX 267000000

struct exynos_ufs_uic_attr {
/* TX Attributes */
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