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tg3: Allow DMAs to cross cacheline boundaries
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By default, the 5717 (and future chips) break up PCIe DMA packets across
cacheline boundaries.  This isn't necessary on x86.  This patch
selectively loosens the restriction.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Matt Carlson authored and David S. Miller committed Nov 16, 2009
1 parent 615774f commit cbf9ca6
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Showing 2 changed files with 16 additions and 7 deletions.
20 changes: 15 additions & 5 deletions drivers/net/tg3.c
Original file line number Diff line number Diff line change
Expand Up @@ -7294,9 +7294,12 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
if (err)
return err;

if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5784 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5761 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
val = tr32(TG3PCI_DMA_RW_CTRL) &
~DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
tw32(TG3PCI_DMA_RW_CTRL, val | tp->dma_rwctrl);
} else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5784 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5761) {
/* This value is determined during the probe time DMA
* engine test, tg3_test_dma.
*/
Expand Down Expand Up @@ -13329,6 +13332,11 @@ static u32 __devinit tg3_calc_dma_bndry(struct tg3 *tp, u32 val)
#endif
#endif

if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
val = goal ? 0 : DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
goto out;
}

if (!goal)
goto out;

Expand Down Expand Up @@ -13523,7 +13531,7 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
{
dma_addr_t buf_dma;
u32 *buf, saved_dma_rwctrl;
int ret;
int ret = 0;

buf = pci_alloc_consistent(tp->pdev, TEST_BUFFER_SIZE, &buf_dma);
if (!buf) {
Expand All @@ -13536,6 +13544,9 @@ static int __devinit tg3_test_dma(struct tg3 *tp)

tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl);

if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
goto out;

if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) {
/* DMA read watermark not used on PCIE */
tp->dma_rwctrl |= 0x00180000;
Expand Down Expand Up @@ -13608,7 +13619,6 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
tg3_switch_clocks(tp);
#endif

ret = 0;
if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701)
goto out;
Expand Down
3 changes: 1 addition & 2 deletions drivers/net/tg3.h
Original file line number Diff line number Diff line change
Expand Up @@ -142,8 +142,7 @@
#define METAL_REV_B1 0x01
#define METAL_REV_B2 0x02
#define TG3PCI_DMA_RW_CTRL 0x0000006c
#define DMA_RWCTRL_MIN_DMA 0x000000ff
#define DMA_RWCTRL_MIN_DMA_SHIFT 0
#define DMA_RWCTRL_DIS_CACHE_ALIGNMENT 0x00000001
#define DMA_RWCTRL_READ_BNDRY_MASK 0x00000700
#define DMA_RWCTRL_READ_BNDRY_DISAB 0x00000000
#define DMA_RWCTRL_READ_BNDRY_16 0x00000100
Expand Down

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