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dt-bindings: net: can: add support for Allwinner R40 CAN controller
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Allwinner R40 (also known as A40i, T3, V40) has a CAN controller. The
controller is the same as in earlier A10 and A20 SoCs, but needs reset
line to be deasserted before use.

This patch Introduces new compatible for R40 CAN controller with
required resets property.

Link: https://lore.kernel.org/all/20211122104616.537156-2-boger@wirenboard.com
Signed-off-by: Evgeny Boger <boger@wirenboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Evgeny Boger authored and Marc Kleine-Budde committed Dec 8, 2021
1 parent 330c6d3 commit d0342ce
Showing 1 changed file with 24 additions and 0 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@ properties:
- const: allwinner,sun7i-a20-can
- const: allwinner,sun4i-a10-can
- const: allwinner,sun4i-a10-can
- const: allwinner,sun8i-r40-can

reg:
maxItems: 1
Expand All @@ -27,6 +28,19 @@ properties:
clocks:
maxItems: 1

resets:
maxItems: 1

if:
properties:
compatible:
contains:
const: allwinner,sun8i-r40-can

then:
required:
- resets

required:
- compatible
- reg
Expand All @@ -47,5 +61,15 @@ examples:
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1_CAN>;
};
- |
#define RST_BUS_CAN 68
#define CLK_BUS_CAN 91
can1: can@1c2bc00 {
compatible = "allwinner,sun8i-r40-can";
reg = <0x01c2bc00 0x400>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CAN>;
resets = <&ccu RST_BUS_CAN>;
};
...

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