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dt-bindings: net: meson-dwmac: convert to yaml
Now that we have the DT validation in place, let's convert the device tree bindings for the Synopsys DWMAC Glue for Amlogic SoCs over to a YAML schemas. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | ||
# Copyright 2019 BayLibre, SAS | ||
%YAML 1.2 | ||
--- | ||
$id: "http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#" | ||
$schema: "http://devicetree.org/meta-schemas/core.yaml#" | ||
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title: Amlogic Meson DWMAC Ethernet controller | ||
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maintainers: | ||
- Neil Armstrong <narmstrong@baylibre.com> | ||
- Martin Blumenstingl <martin.blumenstingl@googlemail.com> | ||
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# We need a select here so we don't match all nodes with 'snps,dwmac' | ||
select: | ||
properties: | ||
compatible: | ||
contains: | ||
enum: | ||
- amlogic,meson6-dwmac | ||
- amlogic,meson8b-dwmac | ||
- amlogic,meson8m2-dwmac | ||
- amlogic,meson-gxbb-dwmac | ||
- amlogic,meson-axg-dwmac | ||
required: | ||
- compatible | ||
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allOf: | ||
- $ref: "snps,dwmac.yaml#" | ||
- if: | ||
properties: | ||
compatible: | ||
contains: | ||
enum: | ||
- amlogic,meson8b-dwmac | ||
- amlogic,meson8m2-dwmac | ||
- amlogic,meson-gxbb-dwmac | ||
- amlogic,meson-axg-dwmac | ||
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then: | ||
properties: | ||
clocks: | ||
items: | ||
- description: GMAC main clock | ||
- description: First parent clock of the internal mux | ||
- description: Second parent clock of the internal mux | ||
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clock-names: | ||
minItems: 3 | ||
maxItems: 3 | ||
items: | ||
- const: stmmaceth | ||
- const: clkin0 | ||
- const: clkin1 | ||
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amlogic,tx-delay-ns: | ||
$ref: /schemas/types.yaml#definitions/uint32 | ||
description: | ||
The internal RGMII TX clock delay (provided by this driver) in | ||
nanoseconds. Allowed values are 0ns, 2ns, 4ns, 6ns. | ||
When phy-mode is set to "rgmii" then the TX delay should be | ||
explicitly configured. When not configured a fallback of 2ns is | ||
used. When the phy-mode is set to either "rgmii-id" or "rgmii-txid" | ||
the TX clock delay is already provided by the PHY. In that case | ||
this property should be set to 0ns (which disables the TX clock | ||
delay in the MAC to prevent the clock from going off because both | ||
PHY and MAC are adding a delay). | ||
Any configuration is ignored when the phy-mode is set to "rmii". | ||
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properties: | ||
compatible: | ||
additionalItems: true | ||
maxItems: 3 | ||
items: | ||
- enum: | ||
- amlogic,meson6-dwmac | ||
- amlogic,meson8b-dwmac | ||
- amlogic,meson8m2-dwmac | ||
- amlogic,meson-gxbb-dwmac | ||
- amlogic,meson-axg-dwmac | ||
contains: | ||
enum: | ||
- snps,dwmac-3.70a | ||
- snps,dwmac | ||
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reg: | ||
items: | ||
- description: | ||
The first register range should be the one of the DWMAC controller | ||
- description: | ||
The second range is is for the Amlogic specific configuration | ||
(for example the PRG_ETHERNET register range on Meson8b and newer) | ||
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required: | ||
- compatible | ||
- reg | ||
- interrupts | ||
- interrupt-names | ||
- clocks | ||
- clock-names | ||
- phy-mode | ||
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examples: | ||
- | | ||
ethmac: ethernet@c9410000 { | ||
compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; | ||
reg = <0xc9410000 0x10000>, <0xc8834540 0x8>; | ||
interrupts = <8>; | ||
interrupt-names = "macirq"; | ||
clocks = <&clk_eth>, <&clkc_fclk_div2>, <&clk_mpll2>; | ||
clock-names = "stmmaceth", "clkin0", "clkin1"; | ||
phy-mode = "rgmii"; | ||
}; |
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