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gpio: etraxfs: add support for ARTPEC-3
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Add support for the GIO block in the ARTPEC-3 SoC.  The basic
functionality is essentialy the same as the version in the ETRAX FS,
except for a different set of ports, including a read-only port.

Cc: devicetree@vger.kernel.org
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Rabin Vincent authored and Linus Walleij committed Jul 27, 2015
1 parent 91492a4 commit d705073
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Showing 2 changed files with 62 additions and 7 deletions.
3 changes: 2 additions & 1 deletion Documentation/devicetree/bindings/gpio/gpio-etraxfs.txt
Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,9 @@ Axis ETRAX FS General I/O controller bindings

Required properties:

- compatible:
- compatible: one of:
- "axis,etraxfs-gio"
- "axis,artpec3-gio"
- reg: Physical base address and length of the controller's registers.
- #gpio-cells: Should be 3
- The first cell is the gpio offset number.
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66 changes: 60 additions & 6 deletions drivers/gpio/gpio-etraxfs.c
Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,17 @@
#define ETRAX_FS_r_pe_din 84
#define ETRAX_FS_rw_pe_oe 88

#define ARTPEC3_r_pa_din 0
#define ARTPEC3_rw_pa_dout 4
#define ARTPEC3_rw_pa_oe 8
#define ARTPEC3_r_pb_din 44
#define ARTPEC3_rw_pb_dout 48
#define ARTPEC3_rw_pb_oe 52
#define ARTPEC3_r_pc_din 88
#define ARTPEC3_rw_pc_dout 92
#define ARTPEC3_rw_pc_oe 96
#define ARTPEC3_r_pd_din 116

struct etraxfs_gpio_port {
const char *label;
unsigned int oe;
Expand Down Expand Up @@ -82,6 +93,40 @@ static const struct etraxfs_gpio_info etraxfs_gpio_etraxfs = {
.ports = etraxfs_gpio_etraxfs_ports,
};

static const struct etraxfs_gpio_port etraxfs_gpio_artpec3_ports[] = {
{
.label = "A",
.ngpio = 32,
.oe = ARTPEC3_rw_pa_oe,
.dout = ARTPEC3_rw_pa_dout,
.din = ARTPEC3_r_pa_din,
},
{
.label = "B",
.ngpio = 32,
.oe = ARTPEC3_rw_pb_oe,
.dout = ARTPEC3_rw_pb_dout,
.din = ARTPEC3_r_pb_din,
},
{
.label = "C",
.ngpio = 16,
.oe = ARTPEC3_rw_pc_oe,
.dout = ARTPEC3_rw_pc_dout,
.din = ARTPEC3_r_pc_din,
},
{
.label = "D",
.ngpio = 32,
.din = ARTPEC3_r_pd_din,
},
};

static const struct etraxfs_gpio_info etraxfs_gpio_artpec3 = {
.num_ports = ARRAY_SIZE(etraxfs_gpio_artpec3_ports),
.ports = etraxfs_gpio_artpec3_ports,
};

static int etraxfs_gpio_of_xlate(struct gpio_chip *gc,
const struct of_phandle_args *gpiospec,
u32 *flags)
Expand All @@ -101,6 +146,10 @@ static const struct of_device_id etraxfs_gpio_of_table[] = {
.compatible = "axis,etraxfs-gio",
.data = &etraxfs_gpio_etraxfs,
},
{
.compatible = "axis,artpec3-gio",
.data = &etraxfs_gpio_artpec3,
},
{},
};

Expand Down Expand Up @@ -133,14 +182,19 @@ static int etraxfs_gpio_probe(struct platform_device *pdev)
for (i = 0; i < info->num_ports; i++) {
struct bgpio_chip *bgc = &chips[i];
const struct etraxfs_gpio_port *port = &info->ports[i];
unsigned long flags = BGPIOF_READ_OUTPUT_REG_SET;
void __iomem *dat = regs + port->din;
void __iomem *set = regs + port->dout;
void __iomem *dirout = regs + port->oe;

if (dirout == set) {
dirout = set = NULL;
flags = BGPIOF_NO_OUTPUT;
}

ret = bgpio_init(bgc, dev, 4,
regs + port->din, /* dat */
regs + port->dout, /* set */
NULL, /* clr */
regs + port->oe, /* dirout */
NULL, /* dirin */
BGPIOF_READ_OUTPUT_REG_SET);
dat, set, NULL, dirout, NULL,
flags);
if (ret)
return ret;

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