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memory-barriers.txt: Fix typo in pairing example
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In the "general barrier pairing with implicit control depdendency"
example, the last write by CPU 1 was meant to change variable x and not
y. The example would be pretty uninteresting if no CPU ever changes x
and the variable was initialized to zero.

Signed-off-by: Scott Tsai <scottt@scottt.tw>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
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Scott Tsai authored and Paul E. McKenney committed Oct 20, 2017
1 parent 0902b1f commit d92f842
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion Documentation/memory-barriers.txt
Original file line number Diff line number Diff line change
Expand Up @@ -947,7 +947,7 @@ Or even:
=============== ===============================
r1 = READ_ONCE(y);
<general barrier>
WRITE_ONCE(y, 1); if (r2 = READ_ONCE(x)) {
WRITE_ONCE(x, 1); if (r2 = READ_ONCE(x)) {
<implicit control dependency>
WRITE_ONCE(y, 1);
}
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