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[POWERPC] 85xx: Add initial MPC8544 DS platform files.
This patch provides the basic MPC8544 DS platform code and config. Follow-up patches will add peripherals such as PCI and SATA. Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Jon Loeliger
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Kumar Gala
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Mar 30, 2007
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/* | ||
* MPC8544 DS Device Tree Source | ||
* | ||
* Copyright 2007 Freescale Semiconductor Inc. | ||
* | ||
* This program is free software; you can redistribute it and/or modify it | ||
* under the terms of the GNU General Public License as published by the | ||
* Free Software Foundation; either version 2 of the License, or (at your | ||
* option) any later version. | ||
*/ | ||
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/ { | ||
model = "MPC8544DS"; | ||
compatible = "MPC8544DS", "MPC85xxDS"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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cpus { | ||
#cpus = <1>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
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PowerPC,8544@0 { | ||
device_type = "cpu"; | ||
reg = <0>; | ||
d-cache-line-size = <20>; // 32 bytes | ||
i-cache-line-size = <20>; // 32 bytes | ||
d-cache-size = <8000>; // L1, 32K | ||
i-cache-size = <8000>; // L1, 32K | ||
timebase-frequency = <0>; | ||
bus-frequency = <0>; | ||
clock-frequency = <0>; | ||
32-bit; | ||
}; | ||
}; | ||
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memory { | ||
device_type = "memory"; | ||
reg = <00000000 00000000>; // Filled by U-Boot | ||
}; | ||
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soc8544@e0000000 { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
#interrupt-cells = <2>; | ||
device_type = "soc"; | ||
ranges = <0 e0000000 00100000>; | ||
reg = <e0000000 00100000>; // CCSRBAR 1M | ||
bus-frequency = <0>; // Filled out by uboot. | ||
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i2c@3000 { | ||
device_type = "i2c"; | ||
compatible = "fsl-i2c"; | ||
reg = <3000 100>; | ||
interrupts = <1b 2>; | ||
interrupt-parent = <&mpic>; | ||
dfsrr; | ||
}; | ||
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mdio@24520 { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
device_type = "mdio"; | ||
compatible = "gianfar"; | ||
reg = <24520 20>; | ||
phy0: ethernet-phy@0 { | ||
interrupt-parent = <&mpic>; | ||
interrupts = <3a 1>; | ||
reg = <0>; | ||
device_type = "ethernet-phy"; | ||
}; | ||
phy1: ethernet-phy@1 { | ||
interrupt-parent = <&mpic>; | ||
interrupts = <3a 1>; | ||
reg = <1>; | ||
device_type = "ethernet-phy"; | ||
}; | ||
}; | ||
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ethernet@24000 { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
device_type = "network"; | ||
model = "TSEC"; | ||
compatible = "gianfar"; | ||
reg = <24000 1000>; | ||
local-mac-address = [ 00 00 00 00 00 00 ]; | ||
interrupts = <d 2 e 2 12 2>; | ||
interrupt-parent = <&mpic>; | ||
phy-handle = <&phy0>; | ||
}; | ||
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ethernet@26000 { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
device_type = "network"; | ||
model = "TSEC"; | ||
compatible = "gianfar"; | ||
reg = <26000 1000>; | ||
local-mac-address = [ 00 00 00 00 00 00 ]; | ||
interrupts = <f 2 10 2 11 2>; | ||
interrupt-parent = <&mpic>; | ||
phy-handle = <&phy1>; | ||
}; | ||
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serial@4500 { | ||
device_type = "serial"; | ||
compatible = "ns16550"; | ||
reg = <4500 100>; | ||
clock-frequency = <0>; | ||
interrupts = <1a 2>; | ||
interrupt-parent = <&mpic>; | ||
}; | ||
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serial@4600 { | ||
device_type = "serial"; | ||
compatible = "ns16550"; | ||
reg = <4600 100>; | ||
clock-frequency = <0>; | ||
interrupts = <1a 2>; | ||
interrupt-parent = <&mpic>; | ||
}; | ||
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mpic: pic@40000 { | ||
clock-frequency = <0>; | ||
interrupt-controller; | ||
#address-cells = <0>; | ||
#interrupt-cells = <2>; | ||
reg = <40000 40000>; | ||
built-in; | ||
compatible = "chrp,open-pic"; | ||
device_type = "open-pic"; | ||
big-endian; | ||
}; | ||
}; | ||
}; |
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/* | ||
* MPC8544 DS Board Setup | ||
* | ||
* Author Xianghua Xiao (x.xiao@freescale.com) | ||
* Copyright 2007 Freescale Semiconductor Inc. | ||
* | ||
* This program is free software; you can redistribute it and/or modify it | ||
* under the terms of the GNU General Public License as published by the | ||
* Free Software Foundation; either version 2 of the License, or (at your | ||
* option) any later version. | ||
*/ | ||
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#include <linux/stddef.h> | ||
#include <linux/kernel.h> | ||
#include <linux/kdev_t.h> | ||
#include <linux/delay.h> | ||
#include <linux/seq_file.h> | ||
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#include <asm/system.h> | ||
#include <asm/time.h> | ||
#include <asm/machdep.h> | ||
#include <asm/mpc85xx.h> | ||
#include <mm/mmu_decl.h> | ||
#include <asm/prom.h> | ||
#include <asm/udbg.h> | ||
#include <asm/mpic.h> | ||
#include <asm/i8259.h> | ||
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#include <sysdev/fsl_soc.h> | ||
#include "mpc85xx.h" | ||
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#undef DEBUG | ||
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#ifdef DEBUG | ||
#define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) | ||
#else | ||
#define DBG(fmt, args...) | ||
#endif | ||
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void __init mpc8544_ds_pic_init(void) | ||
{ | ||
struct mpic *mpic; | ||
struct resource r; | ||
struct device_node *np = NULL; | ||
#ifdef CONFIG_PPC_I8259 | ||
struct device_node *cascade_node = NULL; | ||
int cascade_irq; | ||
#endif | ||
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np = of_find_node_by_type(np, "open-pic"); | ||
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if (np == NULL) { | ||
printk(KERN_ERR "Could not find open-pic node\n"); | ||
return; | ||
} | ||
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if (of_address_to_resource(np, 0, &r)) { | ||
printk(KERN_ERR "Failed to map mpic register space\n"); | ||
of_node_put(np); | ||
return; | ||
} | ||
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/* Alloc mpic structure and per isu has 16 INT entries. */ | ||
mpic = mpic_alloc(np, r.start, | ||
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | ||
16, 64, " OPENPIC "); | ||
BUG_ON(mpic == NULL); | ||
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/* | ||
* 48 Internal Interrupts | ||
*/ | ||
mpic_assign_isu(mpic, 0, r.start + 0x10200); | ||
mpic_assign_isu(mpic, 1, r.start + 0x10400); | ||
mpic_assign_isu(mpic, 2, r.start + 0x10600); | ||
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/* | ||
* 16 External interrupts | ||
*/ | ||
mpic_assign_isu(mpic, 3, r.start + 0x10000); | ||
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mpic_init(mpic); | ||
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#ifdef CONFIG_PPC_I8259 | ||
/* Initialize the i8259 controller */ | ||
for_each_node_by_type(np, "interrupt-controller") | ||
if (device_is_compatible(np, "chrp,iic")) { | ||
cascade_node = np; | ||
break; | ||
} | ||
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if (cascade_node == NULL) { | ||
printk(KERN_DEBUG "Could not find i8259 PIC\n"); | ||
return; | ||
} | ||
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cascade_irq = irq_of_parse_and_map(cascade_node, 0); | ||
if (cascade_irq == NO_IRQ) { | ||
printk(KERN_ERR "Failed to map cascade interrupt\n"); | ||
return; | ||
} | ||
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DBG("mpc8544ds: cascade mapped to irq %d\n", cascade_irq); | ||
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i8259_init(cascade_node, 0); | ||
of_node_put(cascade_node); | ||
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set_irq_chained_handler(cascade_irq, mpc8544_8259_cascade); | ||
#endif /* CONFIG_PPC_I8259 */ | ||
} | ||
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/* | ||
* Setup the architecture | ||
*/ | ||
static void __init mpc8544_ds_setup_arch(void) | ||
{ | ||
if (ppc_md.progress) | ||
ppc_md.progress("mpc8544_ds_setup_arch()", 0); | ||
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printk("MPC8544 DS board from Freescale Semiconductor\n"); | ||
} | ||
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/* | ||
* Called very early, device-tree isn't unflattened | ||
*/ | ||
static int __init mpc8544_ds_probe(void) | ||
{ | ||
unsigned long root = of_get_flat_dt_root(); | ||
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return of_flat_dt_is_compatible(root, "MPC8544DS"); | ||
} | ||
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define_machine(mpc8544_ds) { | ||
.name = "MPC8544 DS", | ||
.probe = mpc8544_ds_probe, | ||
.setup_arch = mpc8544_ds_setup_arch, | ||
.init_IRQ = mpc8544_ds_pic_init, | ||
.get_irq = mpic_get_irq, | ||
.restart = mpc85xx_restart, | ||
.calibrate_decr = generic_calibrate_decr, | ||
.progress = udbg_progress, | ||
}; |