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dt-bindings: timer: Convert Allwinner A13 HSTimer to a schema
The newer Allwinner SoCs have a High Speed Timer supported in Linux, with a matching Device Tree binding. Now that we have the DT validation in place, let's convert the device tree bindings for that controller over to a YAML schemas. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Maxime Ripard
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Daniel Lezcano
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Aug 26, 2019
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Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt
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Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml
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# SPDX-License-Identifier: GPL-2.0 | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/timer/allwinner,sun5i-a13-hstimer.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Allwinner A13 High-Speed Timer Device Tree Bindings | ||
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maintainers: | ||
- Chen-Yu Tsai <wens@csie.org> | ||
- Maxime Ripard <maxime.ripard@bootlin.com> | ||
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properties: | ||
compatible: | ||
oneOf: | ||
- const: allwinner,sun5i-a13-hstimer | ||
- const: allwinner,sun7i-a20-hstimer | ||
- items: | ||
- const: allwinner,sun6i-a31-hstimer | ||
- const: allwinner,sun7i-a20-hstimer | ||
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reg: | ||
maxItems: 1 | ||
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interrupts: | ||
minItems: 2 | ||
maxItems: 4 | ||
items: | ||
- description: Timer 0 Interrupt | ||
- description: Timer 1 Interrupt | ||
- description: Timer 2 Interrupt | ||
- description: Timer 3 Interrupt | ||
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clocks: | ||
maxItems: 1 | ||
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resets: | ||
maxItems: 1 | ||
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required: | ||
- compatible | ||
- reg | ||
- interrupts | ||
- clocks | ||
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if: | ||
properties: | ||
compatible: | ||
items: | ||
const: allwinner,sun5i-a13-hstimer | ||
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then: | ||
properties: | ||
interrupts: | ||
minItems: 2 | ||
maxItems: 2 | ||
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else: | ||
properties: | ||
interrupts: | ||
minItems: 4 | ||
maxItems: 4 | ||
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additionalProperties: false | ||
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examples: | ||
- | | ||
timer@1c60000 { | ||
compatible = "allwinner,sun7i-a20-hstimer"; | ||
reg = <0x01c60000 0x1000>; | ||
interrupts = <0 51 1>, | ||
<0 52 1>, | ||
<0 53 1>, | ||
<0 54 1>; | ||
clocks = <&ahb1_gates 19>; | ||
resets = <&ahb1rst 19>; | ||
}; | ||
... |