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davinci-mcasp: fix _CBM_CFS pin directions
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The current davinci_mcasp_set_dai_fmt() sets bits ACLKX and ACLKR in the PDIR
register for the codec clock-master/frame-slave mode; however, this results in
the ACLKX and ACLKR pins being outputs according to SPRUFM1 [1]  which
conflicts with "codec is clock master."

Similarly to the previous patch in this series, "fix _CBM_CFS hw_params" --
For codec clock-master/frame-slave mode (_CMB_CFS), clear bits ACLKX and ACLKR
in the PDIR register to set the pins as inputs and hence allow externally
sourced bit-clocks.

[1] http://www.ti.com/litv/pdf/sprufm1

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: James Nuss <jamesnuss@nanometrics.ca>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Ben Gardiner authored and Mark Brown committed Apr 26, 2011
1 parent a90f549 commit db92f43
Showing 1 changed file with 3 additions and 1 deletion.
4 changes: 3 additions & 1 deletion sound/soc/davinci/davinci-mcasp.c
Original file line number Diff line number Diff line change
Expand Up @@ -445,8 +445,10 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);
mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE);

mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG,
ACLKX | ACLKR);
mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG,
ACLKX | AFSX | ACLKR | AFSR);
AFSX | AFSR);
break;
case SND_SOC_DAIFMT_CBM_CFM:
/* codec is clock and frame master */
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