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drm/amd/display: Clean up flip pending timeout handling
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[Why]
Adjust timeout handling code for easier runtime manipulation
during debug. Change has no functional effect by default.

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Joshua Aberback authored and Alex Deucher committed Aug 7, 2023
1 parent e24b2fd commit dbca831
Showing 1 changed file with 9 additions and 8 deletions.
17 changes: 9 additions & 8 deletions drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
Original file line number Diff line number Diff line change
Expand Up @@ -1269,20 +1269,21 @@ void dcn20_pipe_control_lock(
}

if (flip_immediate && lock) {
const int TIMEOUT_FOR_FLIP_PENDING = 100000;
const int TIMEOUT_FOR_FLIP_PENDING_US = 100000;
unsigned int polling_interval_us = 1;
int i;

temp_pipe = pipe;
while (temp_pipe) {
if (temp_pipe->plane_state && temp_pipe->plane_state->flip_immediate) {
for (i = 0; i < TIMEOUT_FOR_FLIP_PENDING; ++i) {
for (i = 0; i < TIMEOUT_FOR_FLIP_PENDING_US / polling_interval_us; ++i) {
if (!temp_pipe->plane_res.hubp->funcs->hubp_is_flip_pending(temp_pipe->plane_res.hubp))
break;
udelay(1);
udelay(polling_interval_us);
}

/* no reason it should take this long for immediate flips */
ASSERT(i != TIMEOUT_FOR_FLIP_PENDING);
ASSERT(i != TIMEOUT_FOR_FLIP_PENDING_US);
}
temp_pipe = temp_pipe->bottom_pipe;
}
Expand Down Expand Up @@ -1952,7 +1953,8 @@ void dcn20_post_unlock_program_front_end(
struct dc_state *context)
{
int i;
const unsigned int TIMEOUT_FOR_PIPE_ENABLE_MS = 100;
const unsigned int TIMEOUT_FOR_PIPE_ENABLE_US = 100000;
unsigned int polling_interval_us = 1;
struct dce_hwseq *hwseq = dc->hwseq;

DC_LOGGER_INIT(dc->ctx->logger);
Expand All @@ -1974,10 +1976,9 @@ void dcn20_post_unlock_program_front_end(
pipe->stream->mall_stream_config.type != SUBVP_PHANTOM) {
struct hubp *hubp = pipe->plane_res.hubp;
int j = 0;

for (j = 0; j < TIMEOUT_FOR_PIPE_ENABLE_MS*1000
for (j = 0; j < TIMEOUT_FOR_PIPE_ENABLE_US / polling_interval_us
&& hubp->funcs->hubp_is_flip_pending(hubp); j++)
udelay(1);
udelay(polling_interval_us);
}
}

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