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powerpc/32: Move exception prolog code into .text once MMU is back on
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The space in the head section is rather constrained by the fact that
exception vectors are spread every 0x100 bytes and sometimes we
need to have "out of line" code because it doesn't fit.

Now that we are enabling MMU early in the prolog, take that opportunity
to jump somewhere else in the .text section where we don't have any
space constraint.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/38b31ca4bc782a4985bc7952a675404d7ff27c24.1615552867.git.christophe.leroy@csgroup.eu
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Christophe Leroy authored and Michael Ellerman committed Mar 29, 2021
1 parent 7bf1d7e commit dc13b88
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Showing 4 changed files with 36 additions and 34 deletions.
5 changes: 5 additions & 0 deletions arch/powerpc/kernel/head_32.h
Original file line number Diff line number Diff line change
Expand Up @@ -70,6 +70,8 @@
mtspr SPRN_SRR0, r11
mfspr r11, SPRN_SPRG_SCRATCH2
rfi

.text
1:
stw r11,GPR1(r1)
stw r11,0(r1)
Expand Down Expand Up @@ -163,12 +165,14 @@
*/
#ifdef CONFIG_PPC_BOOK3S
#define START_EXCEPTION(n, label) \
__HEAD; \
. = n; \
DO_KVM n; \
label:

#else
#define START_EXCEPTION(n, label) \
__HEAD; \
. = n; \
label:

Expand Down Expand Up @@ -196,6 +200,7 @@
ret_from_except)

.macro vmap_stack_overflow_exception
__HEAD
vmap_stack_overflow:
#ifdef CONFIG_SMP
mfspr r1, SPRN_SPRG_THREAD
Expand Down
6 changes: 6 additions & 0 deletions arch/powerpc/kernel/head_40x.S
Original file line number Diff line number Diff line change
Expand Up @@ -132,6 +132,8 @@ _ENTRY(crit_esr)
ori r11, r11, 1f@l
mtspr SPRN_SRR0, r11
rfi

.text
1:
lwz r11,crit_r1@l(0)
stw r11,GPR1(r1)
Expand Down Expand Up @@ -496,6 +498,7 @@ _ENTRY(crit_esr)
crit_transfer_to_handler, ret_from_crit_exc)

/* Programmable Interval Timer (PIT) Exception. (from 0x1000) */
__HEAD
Decrementer:
EXCEPTION_PROLOG
lis r0,TSR_PIS@h
Expand All @@ -504,12 +507,14 @@ Decrementer:
EXC_XFER_LITE(0x1000, timer_interrupt)

/* Fixed Interval Timer (FIT) Exception. (from 0x1010) */
__HEAD
FITException:
EXCEPTION_PROLOG
addi r3,r1,STACK_FRAME_OVERHEAD;
EXC_XFER_STD(0x1010, unknown_exception)

/* Watchdog Timer (WDT) Exception. (from 0x1020) */
__HEAD
WDTException:
CRITICAL_EXCEPTION_PROLOG;
addi r3,r1,STACK_FRAME_OVERHEAD;
Expand All @@ -523,6 +528,7 @@ WDTException:
* reserved.
*/

__HEAD
/* Damn, I came up one instruction too many to fit into the
* exception space :-). Both the instruction and data TLB
* miss get to this point to load the TLB.
Expand Down
25 changes: 10 additions & 15 deletions arch/powerpc/kernel/head_8xx.S
Original file line number Diff line number Diff line change
Expand Up @@ -133,19 +133,14 @@ instruction_counter:
START_EXCEPTION(0x600, Alignment)
EXCEPTION_PROLOG handle_dar_dsisr=1
addi r3,r1,STACK_FRAME_OVERHEAD
b .Lalignment_exception_ool
EXC_XFER_STD(0x600, alignment_exception)

/* Program check exception */
EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)

/* Decrementer */
EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)

/* With VMAP_STACK there's not enough room for this at 0x600 */
. = 0xa00
.Lalignment_exception_ool:
EXC_XFER_STD(0x600, alignment_exception)

/* System call */
START_EXCEPTION(0xc00, SystemCall)
SYSCALL_ENTRY 0xc00
Expand Down Expand Up @@ -339,26 +334,25 @@ DARFixed:/* Return from dcbx instruction bug workaround */
* support of breakpoints and such. Someday I will get around to
* using them.
*/
do_databreakpoint:
EXCEPTION_PROLOG_1
EXCEPTION_PROLOG_2 handle_dar_dsisr=1
addi r3,r1,STACK_FRAME_OVERHEAD
mfspr r4,SPRN_BAR
stw r4,_DAR(r11)
EXC_XFER_STD(0x1c00, do_break)

START_EXCEPTION(0x1c00, DataBreakpoint)
EXCEPTION_PROLOG_0 handle_dar_dsisr=1
mfspr r11, SPRN_SRR0
cmplwi cr1, r11, (.Ldtlbie - PAGE_OFFSET)@l
cmplwi cr7, r11, (.Litlbie - PAGE_OFFSET)@l
cror 4*cr1+eq, 4*cr1+eq, 4*cr7+eq
bne cr1, do_databreakpoint
bne cr1, 1f
mtcr r10
mfspr r10, SPRN_SPRG_SCRATCH0
mfspr r11, SPRN_SPRG_SCRATCH1
rfi

1: EXCEPTION_PROLOG_1
EXCEPTION_PROLOG_2 handle_dar_dsisr=1
addi r3,r1,STACK_FRAME_OVERHEAD
mfspr r4,SPRN_BAR
stw r4,_DAR(r11)
EXC_XFER_STD(0x1c00, do_break)

#ifdef CONFIG_PERF_EVENTS
START_EXCEPTION(0x1d00, InstructionBreakpoint)
mtspr SPRN_SPRG_SCRATCH0, r10
Expand All @@ -376,6 +370,7 @@ do_databreakpoint:
EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_STD)
EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_STD)

__HEAD
. = 0x2000

/* This is the procedure to calculate the data EA for buggy dcbx,dcbi instructions
Expand Down
34 changes: 15 additions & 19 deletions arch/powerpc/kernel/head_book3s_32.S
Original file line number Diff line number Diff line change
Expand Up @@ -269,11 +269,10 @@ __secondary_hold_acknowledge:
7: EXCEPTION_PROLOG_2
addi r3,r1,STACK_FRAME_OVERHEAD
#ifdef CONFIG_PPC_CHRP
beq cr1, machine_check_tramp
beq cr1, 1f
twi 31, 0, 0
#else
b machine_check_tramp
#endif
1: EXC_XFER_STD(0x200, machine_check_exception)

/* Data access exception. */
START_EXCEPTION(0x300, DataAccess)
Expand All @@ -297,7 +296,13 @@ ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_HPTE_TABLE)
#endif
1: EXCEPTION_PROLOG_0 handle_dar_dsisr=1
EXCEPTION_PROLOG_1
b handle_page_fault_tramp_1
EXCEPTION_PROLOG_2 handle_dar_dsisr=1
lwz r5, _DSISR(r11)
andis. r0, r5, DSISR_DABRMATCH@h
bne- 1f
EXC_XFER_LITE(0x300, handle_page_fault)
1: EXC_XFER_STD(0x300, do_break)


/* Instruction access exception. */
START_EXCEPTION(0x400, InstructionAccess)
Expand Down Expand Up @@ -333,7 +338,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
START_EXCEPTION(0x600, Alignment)
EXCEPTION_PROLOG handle_dar_dsisr=1
addi r3,r1,STACK_FRAME_OVERHEAD
b alignment_exception_tramp
EXC_XFER_STD(0x600, alignment_exception)

/* Program check exception */
EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
Expand Down Expand Up @@ -385,6 +390,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_FPU_UNAVAILABLE)
START_EXCEPTION(0xf20, AltiVecUnavailableTrap)
b AltiVecUnavailable

__HEAD
/*
* Handle TLB miss for instruction on 603/603e.
* Note: we get an alternate set of r0 - r3 to use automatically.
Expand Down Expand Up @@ -627,22 +633,9 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
EXCEPTION(0x2e00, Trap_2e, unknown_exception, EXC_XFER_STD)
EXCEPTION(0x2f00, Trap_2f, unknown_exception, EXC_XFER_STD)

__HEAD
. = 0x3000

machine_check_tramp:
EXC_XFER_STD(0x200, machine_check_exception)

alignment_exception_tramp:
EXC_XFER_STD(0x600, alignment_exception)

handle_page_fault_tramp_1:
EXCEPTION_PROLOG_2 handle_dar_dsisr=1
lwz r5, _DSISR(r11)
andis. r0, r5, DSISR_DABRMATCH@h
bne- 1f
EXC_XFER_LITE(0x300, handle_page_fault)
1: EXC_XFER_STD(0x300, do_break)

#ifdef CONFIG_PPC_BOOK3S_604
.macro save_regs_thread thread
stw r0, THR0(\thread)
Expand Down Expand Up @@ -721,6 +714,7 @@ fast_hash_page_return:
vmap_stack_overflow_exception
#endif

__HEAD
AltiVecUnavailable:
EXCEPTION_PROLOG
#ifdef CONFIG_ALTIVEC
Expand All @@ -731,12 +725,14 @@ AltiVecUnavailable:
1: addi r3,r1,STACK_FRAME_OVERHEAD
EXC_XFER_LITE(0xf20, altivec_unavailable_exception)

__HEAD
PerformanceMonitor:
EXCEPTION_PROLOG
addi r3,r1,STACK_FRAME_OVERHEAD
EXC_XFER_STD(0xf00, performance_monitor_exception)


__HEAD
/*
* This code is jumped to from the startup code to copy
* the kernel image to physical address PHYSICAL_START.
Expand Down

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