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dt-bindings: add bindings for rk3128 clock controller
Add devicetree bindings for Rockchip cru which found on Rockchip SoCs. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt
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* Rockchip RK3128 Clock and Reset Unit | ||
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The RK3128 clock controller generates and supplies clock to various | ||
controllers within the SoC and also implements a reset controller for SoC | ||
peripherals. | ||
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Required Properties: | ||
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- compatible: should be "rockchip,rk3128-cru" | ||
- reg: physical base address of the controller and length of memory mapped | ||
region. | ||
- #clock-cells: should be 1. | ||
- #reset-cells: should be 1. | ||
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Optional Properties: | ||
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- rockchip,grf: phandle to the syscon managing the "general register files" | ||
If missing pll rates are not changeable, due to the missing pll lock status. | ||
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Each clock is assigned an identifier and client nodes can use this identifier | ||
to specify the clock which they consume. All available clocks are defined as | ||
preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be | ||
used in device tree sources. Similar macros exist for the reset sources in | ||
these files. | ||
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External clocks: | ||
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There are several clocks that are generated outside the SoC. It is expected | ||
that they are defined using standard clock bindings with following | ||
clock-output-names: | ||
- "xin24m" - crystal input - required, | ||
- "ext_i2s" - external I2S clock - optional, | ||
- "gmac_clkin" - external GMAC clock - optional | ||
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Example: Clock controller node: | ||
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cru: cru@20000000 { | ||
compatible = "rockchip,rk3128-cru"; | ||
reg = <0x20000000 0x1000>; | ||
rockchip,grf = <&grf>; | ||
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#clock-cells = <1>; | ||
#reset-cells = <1>; | ||
}; | ||
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Example: UART controller node that consumes the clock generated by the clock | ||
controller: | ||
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uart2: serial@20068000 { | ||
compatible = "rockchip,serial"; | ||
reg = <0x20068000 0x100>; | ||
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; | ||
clock-frequency = <24000000>; | ||
clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; | ||
clock-names = "sclk_uart", "pclk_uart"; | ||
}; |