drm/i915/gvt: vGPU MMIO virtualization

This patch introduces the generic vGPU MMIO emulation intercept
framework.  The MPT modules will request GVT-g core logic to
emulate MMIO read/write through IO emulation operations
callback when hypervisor trapped a guest GTTMMIO read/write.

Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

drivers/gpu/drm/i915/gvt/Makefile

@@ -1,6 +1,6 @@
 GVT_DIR := gvt
 GVT_SOURCE := gvt.o aperture_gm.o handlers.o vgpu.o trace_points.o firmware.o \
-	interrupt.o gtt.o cfg_space.o opregion.o
+	interrupt.o gtt.o cfg_space.o opregion.o mmio.o
 
 ccflags-y                      += -I$(src) -I$(src)/$(GVT_DIR) -Wall
 i915-y			       += $(addprefix $(GVT_DIR)/, $(GVT_SOURCE))

drivers/gpu/drm/i915/gvt/debug.h

@@ -36,4 +36,7 @@
 #define gvt_dbg_mm(fmt, args...) \
 	DRM_DEBUG_DRIVER("gvt: mm: "fmt, ##args)
 
+#define gvt_dbg_mmio(fmt, args...) \
+	DRM_DEBUG_DRIVER("gvt: mmio: "fmt, ##args)
+
 #endif

drivers/gpu/drm/i915/gvt/gvt.c

@@ -45,6 +45,8 @@ static const char * const supported_hypervisors[] = {
 struct intel_gvt_io_emulation_ops intel_gvt_io_emulation_ops = {
 	.emulate_cfg_read = intel_vgpu_emulate_cfg_read,
 	.emulate_cfg_write = intel_vgpu_emulate_cfg_write,
+	.emulate_mmio_read = intel_vgpu_emulate_mmio_read,
+	.emulate_mmio_write = intel_vgpu_emulate_mmio_write,
 };
 
 /**

drivers/gpu/drm/i915/gvt/gvt.h

@@ -87,6 +87,7 @@ struct intel_vgpu_fence {
 struct intel_vgpu_mmio {
 	void *vreg;
 	void *sreg;
+	bool disable_warn_untrack;
 };
 
 #define INTEL_GVT_MAX_CFG_SPACE_SZ 256
@@ -184,6 +185,8 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt);
 #define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.mappable_base)
 
 #define gvt_ggtt_gm_sz(gvt)	  (gvt->dev_priv->ggtt.base.total)
+#define gvt_ggtt_sz(gvt) \
+	((gvt->dev_priv->ggtt.base.total >> PAGE_SHIFT) << 3)
 #define gvt_hidden_sz(gvt)	  (gvt_ggtt_gm_sz(gvt) - gvt_aperture_sz(gvt))
 
 #define gvt_aperture_gmadr_base(gvt) (0)