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dt-bindings: can: flexcan: convert fsl,*flexcan bindings to yaml
In order to automate the verification of DT nodes convert fsl-flexcan.txt to fsl,flexcan.yaml Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201022075218.11880-3-o.rempel@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: | ||
Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC). | ||
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maintainers: | ||
- Marc Kleine-Budde <mkl@pengutronix.de> | ||
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allOf: | ||
- $ref: can-controller.yaml# | ||
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properties: | ||
compatible: | ||
oneOf: | ||
- enum: | ||
- fsl,imx8qm-flexcan | ||
- fsl,imx8mp-flexcan | ||
- fsl,imx6q-flexcan | ||
- fsl,imx53-flexcan | ||
- fsl,imx35-flexcan | ||
- fsl,imx28-flexcan | ||
- fsl,imx25-flexcan | ||
- fsl,p1010-flexcan | ||
- fsl,vf610-flexcan | ||
- fsl,ls1021ar2-flexcan | ||
- fsl,lx2160ar1-flexcan | ||
- items: | ||
- enum: | ||
- fsl,imx7d-flexcan | ||
- fsl,imx6ul-flexcan | ||
- fsl,imx6sx-flexcan | ||
- const: fsl,imx6q-flexcan | ||
- items: | ||
- enum: | ||
- fsl,ls1028ar1-flexcan | ||
- const: fsl,lx2160ar1-flexcan | ||
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reg: | ||
maxItems: 1 | ||
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interrupts: | ||
maxItems: 1 | ||
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clocks: | ||
maxItems: 2 | ||
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clock-names: | ||
items: | ||
- const: ipg | ||
- const: per | ||
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clock-frequency: | ||
description: | | ||
The oscillator frequency driving the flexcan device, filled in by the | ||
boot loader. This property should only be used the used operating system | ||
doesn't support the clocks and clock-names property. | ||
xceiver-supply: | ||
description: Regulator that powers the CAN transceiver. | ||
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big-endian: | ||
$ref: /schemas/types.yaml#/definitions/flag | ||
description: | | ||
This means the registers of FlexCAN controller are big endian. This is | ||
optional property.i.e. if this property is not present in device tree | ||
node then controller is assumed to be little endian. If this property is | ||
present then controller is assumed to be big endian. | ||
fsl,stop-mode: | ||
description: | | ||
Register bits of stop mode control. | ||
The format should be as follows: | ||
<gpr req_gpr req_bit> | ||
gpr is the phandle to general purpose register node. | ||
req_gpr is the gpr register offset of CAN stop request. | ||
req_bit is the bit offset of CAN stop request. | ||
$ref: /schemas/types.yaml#/definitions/phandle-array | ||
items: | ||
- description: The 'gpr' is the phandle to general purpose register node. | ||
- description: The 'req_gpr' is the gpr register offset of CAN stop request. | ||
maximum: 0xff | ||
- description: The 'req_bit' is the bit offset of CAN stop request. | ||
maximum: 0x1f | ||
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fsl,clk-source: | ||
description: | | ||
Select the clock source to the CAN Protocol Engine (PE). It's SoC | ||
implementation dependent. Refer to RM for detailed definition. If this | ||
property is not set in device tree node then driver selects clock source 1 | ||
by default. | ||
0: clock source 0 (oscillator clock) | ||
1: clock source 1 (peripheral clock) | ||
$ref: /schemas/types.yaml#/definitions/uint32 | ||
default: 1 | ||
minimum: 0 | ||
maximum: 1 | ||
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wakeup-source: | ||
$ref: /schemas/types.yaml#/definitions/flag | ||
description: | ||
Enable CAN remote wakeup. | ||
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required: | ||
- compatible | ||
- reg | ||
- interrupts | ||
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additionalProperties: false | ||
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examples: | ||
- | | ||
can@1c000 { | ||
compatible = "fsl,p1010-flexcan"; | ||
reg = <0x1c000 0x1000>; | ||
interrupts = <48 0x2>; | ||
interrupt-parent = <&mpic>; | ||
clock-frequency = <200000000>; | ||
fsl,clk-source = <0>; | ||
}; | ||
- | | ||
#include <dt-bindings/interrupt-controller/irq.h> | ||
can@2090000 { | ||
compatible = "fsl,imx6q-flexcan"; | ||
reg = <0x02090000 0x4000>; | ||
interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; | ||
clocks = <&clks 1>, <&clks 2>; | ||
clock-names = "ipg", "per"; | ||
fsl,stop-mode = <&gpr 0x34 28>; | ||
}; |
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