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clk: ti: Drop legacy compatibility clocks for am4
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We no longer have users for the compatibility clocks and we can drop them.
These are old duplicate clocks for what we using.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20220203085618.16043-3-tony@atomide.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Tony Lindgren authored and Stephen Boyd committed Mar 15, 2022
1 parent 8850c3e commit e65eb2e
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Showing 6 changed files with 6 additions and 344 deletions.
3 changes: 1 addition & 2 deletions drivers/clk/ti/Makefile
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Expand Up @@ -18,8 +18,7 @@ obj-$(CONFIG_SOC_OMAP5) += $(clk-common) clk-54xx.o \
obj-$(CONFIG_SOC_DRA7XX) += $(clk-common) clk-7xx.o \
clk-dra7-atl.o dpll3xxx.o \
dpll44xx.o clk-7xx-compat.o
obj-$(CONFIG_SOC_AM43XX) += $(clk-common) dpll3xxx.o clk-43xx.o \
clk-43xx-compat.o
obj-$(CONFIG_SOC_AM43XX) += $(clk-common) dpll3xxx.o clk-43xx.o

endif # CONFIG_ARCH_OMAP2PLUS

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225 changes: 0 additions & 225 deletions drivers/clk/ti/clk-43xx-compat.c
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This file was deleted.

5 changes: 1 addition & 4 deletions drivers/clk/ti/clk-43xx.c
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Expand Up @@ -282,10 +282,7 @@ int __init am43xx_dt_clk_init(void)
{
struct clk *clk1, *clk2;

if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT)
ti_dt_clocks_register(am43xx_compat_clks);
else
ti_dt_clocks_register(am43xx_clks);
ti_dt_clocks_register(am43xx_clks);

omap2_clk_disable_autoidle_all();

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16 changes: 4 additions & 12 deletions drivers/clk/ti/clkctrl.c
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Expand Up @@ -564,19 +564,11 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
data = am3_clkctrl_data;
#endif
#ifdef CONFIG_SOC_AM43XX
if (of_machine_is_compatible("ti,am4372")) {
if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT)
data = am4_clkctrl_compat_data;
else
data = am4_clkctrl_data;
}
if (of_machine_is_compatible("ti,am4372"))
data = am4_clkctrl_data;

if (of_machine_is_compatible("ti,am438x")) {
if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT)
data = am438x_clkctrl_compat_data;
else
data = am438x_clkctrl_data;
}
if (of_machine_is_compatible("ti,am438x"))
data = am438x_clkctrl_data;
#endif
#ifdef CONFIG_SOC_TI81XX
if (of_machine_is_compatible("ti,dm814"))
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3 changes: 0 additions & 3 deletions drivers/clk/ti/clock.h
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Expand Up @@ -201,10 +201,7 @@ extern const struct omap_clkctrl_data am3_clkctrl_data[];
extern const struct omap_clkctrl_data am3_clkctrl_compat_data[];
extern struct ti_dt_clk am33xx_compat_clks[];
extern const struct omap_clkctrl_data am4_clkctrl_data[];
extern const struct omap_clkctrl_data am4_clkctrl_compat_data[];
extern struct ti_dt_clk am43xx_compat_clks[];
extern const struct omap_clkctrl_data am438x_clkctrl_data[];
extern const struct omap_clkctrl_data am438x_clkctrl_compat_data[];
extern const struct omap_clkctrl_data dm814_clkctrl_data[];
extern const struct omap_clkctrl_data dm816_clkctrl_data[];

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98 changes: 0 additions & 98 deletions include/dt-bindings/clock/am4.h
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Expand Up @@ -8,104 +8,6 @@
#define AM4_CLKCTRL_OFFSET 0x20
#define AM4_CLKCTRL_INDEX(offset) ((offset) - AM4_CLKCTRL_OFFSET)

/* XXX: Compatibility part begin, remove this once compatibility support is no longer needed */

/* l4_wkup clocks */
#define AM4_ADC_TSC_CLKCTRL AM4_CLKCTRL_INDEX(0x120)
#define AM4_L4_WKUP_CLKCTRL AM4_CLKCTRL_INDEX(0x220)
#define AM4_WKUP_M3_CLKCTRL AM4_CLKCTRL_INDEX(0x228)
#define AM4_COUNTER_32K_CLKCTRL AM4_CLKCTRL_INDEX(0x230)
#define AM4_TIMER1_CLKCTRL AM4_CLKCTRL_INDEX(0x328)
#define AM4_WD_TIMER2_CLKCTRL AM4_CLKCTRL_INDEX(0x338)
#define AM4_I2C1_CLKCTRL AM4_CLKCTRL_INDEX(0x340)
#define AM4_UART1_CLKCTRL AM4_CLKCTRL_INDEX(0x348)
#define AM4_SMARTREFLEX0_CLKCTRL AM4_CLKCTRL_INDEX(0x350)
#define AM4_SMARTREFLEX1_CLKCTRL AM4_CLKCTRL_INDEX(0x358)
#define AM4_CONTROL_CLKCTRL AM4_CLKCTRL_INDEX(0x360)
#define AM4_GPIO1_CLKCTRL AM4_CLKCTRL_INDEX(0x368)

/* mpu clocks */
#define AM4_MPU_CLKCTRL AM4_CLKCTRL_INDEX(0x20)

/* gfx_l3 clocks */
#define AM4_GFX_CLKCTRL AM4_CLKCTRL_INDEX(0x20)

/* l4_rtc clocks */
#define AM4_RTC_CLKCTRL AM4_CLKCTRL_INDEX(0x20)

/* l4_per clocks */
#define AM4_L3_MAIN_CLKCTRL AM4_CLKCTRL_INDEX(0x20)
#define AM4_AES_CLKCTRL AM4_CLKCTRL_INDEX(0x28)
#define AM4_DES_CLKCTRL AM4_CLKCTRL_INDEX(0x30)
#define AM4_L3_INSTR_CLKCTRL AM4_CLKCTRL_INDEX(0x40)
#define AM4_OCMCRAM_CLKCTRL AM4_CLKCTRL_INDEX(0x50)
#define AM4_SHAM_CLKCTRL AM4_CLKCTRL_INDEX(0x58)
#define AM4_VPFE0_CLKCTRL AM4_CLKCTRL_INDEX(0x68)
#define AM4_VPFE1_CLKCTRL AM4_CLKCTRL_INDEX(0x70)
#define AM4_TPCC_CLKCTRL AM4_CLKCTRL_INDEX(0x78)
#define AM4_TPTC0_CLKCTRL AM4_CLKCTRL_INDEX(0x80)
#define AM4_TPTC1_CLKCTRL AM4_CLKCTRL_INDEX(0x88)
#define AM4_TPTC2_CLKCTRL AM4_CLKCTRL_INDEX(0x90)
#define AM4_L4_HS_CLKCTRL AM4_CLKCTRL_INDEX(0xa0)
#define AM4_GPMC_CLKCTRL AM4_CLKCTRL_INDEX(0x220)
#define AM4_MCASP0_CLKCTRL AM4_CLKCTRL_INDEX(0x238)
#define AM4_MCASP1_CLKCTRL AM4_CLKCTRL_INDEX(0x240)
#define AM4_MMC3_CLKCTRL AM4_CLKCTRL_INDEX(0x248)
#define AM4_QSPI_CLKCTRL AM4_CLKCTRL_INDEX(0x258)
#define AM4_USB_OTG_SS0_CLKCTRL AM4_CLKCTRL_INDEX(0x260)
#define AM4_USB_OTG_SS1_CLKCTRL AM4_CLKCTRL_INDEX(0x268)
#define AM4_PRUSS_CLKCTRL AM4_CLKCTRL_INDEX(0x320)
#define AM4_L4_LS_CLKCTRL AM4_CLKCTRL_INDEX(0x420)
#define AM4_D_CAN0_CLKCTRL AM4_CLKCTRL_INDEX(0x428)
#define AM4_D_CAN1_CLKCTRL AM4_CLKCTRL_INDEX(0x430)
#define AM4_EPWMSS0_CLKCTRL AM4_CLKCTRL_INDEX(0x438)
#define AM4_EPWMSS1_CLKCTRL AM4_CLKCTRL_INDEX(0x440)
#define AM4_EPWMSS2_CLKCTRL AM4_CLKCTRL_INDEX(0x448)
#define AM4_EPWMSS3_CLKCTRL AM4_CLKCTRL_INDEX(0x450)
#define AM4_EPWMSS4_CLKCTRL AM4_CLKCTRL_INDEX(0x458)
#define AM4_EPWMSS5_CLKCTRL AM4_CLKCTRL_INDEX(0x460)
#define AM4_ELM_CLKCTRL AM4_CLKCTRL_INDEX(0x468)
#define AM4_GPIO2_CLKCTRL AM4_CLKCTRL_INDEX(0x478)
#define AM4_GPIO3_CLKCTRL AM4_CLKCTRL_INDEX(0x480)
#define AM4_GPIO4_CLKCTRL AM4_CLKCTRL_INDEX(0x488)
#define AM4_GPIO5_CLKCTRL AM4_CLKCTRL_INDEX(0x490)
#define AM4_GPIO6_CLKCTRL AM4_CLKCTRL_INDEX(0x498)
#define AM4_HDQ1W_CLKCTRL AM4_CLKCTRL_INDEX(0x4a0)
#define AM4_I2C2_CLKCTRL AM4_CLKCTRL_INDEX(0x4a8)
#define AM4_I2C3_CLKCTRL AM4_CLKCTRL_INDEX(0x4b0)
#define AM4_MAILBOX_CLKCTRL AM4_CLKCTRL_INDEX(0x4b8)
#define AM4_MMC1_CLKCTRL AM4_CLKCTRL_INDEX(0x4c0)
#define AM4_MMC2_CLKCTRL AM4_CLKCTRL_INDEX(0x4c8)
#define AM4_RNG_CLKCTRL AM4_CLKCTRL_INDEX(0x4e0)
#define AM4_SPI0_CLKCTRL AM4_CLKCTRL_INDEX(0x500)
#define AM4_SPI1_CLKCTRL AM4_CLKCTRL_INDEX(0x508)
#define AM4_SPI2_CLKCTRL AM4_CLKCTRL_INDEX(0x510)
#define AM4_SPI3_CLKCTRL AM4_CLKCTRL_INDEX(0x518)
#define AM4_SPI4_CLKCTRL AM4_CLKCTRL_INDEX(0x520)
#define AM4_SPINLOCK_CLKCTRL AM4_CLKCTRL_INDEX(0x528)
#define AM4_TIMER2_CLKCTRL AM4_CLKCTRL_INDEX(0x530)
#define AM4_TIMER3_CLKCTRL AM4_CLKCTRL_INDEX(0x538)
#define AM4_TIMER4_CLKCTRL AM4_CLKCTRL_INDEX(0x540)
#define AM4_TIMER5_CLKCTRL AM4_CLKCTRL_INDEX(0x548)
#define AM4_TIMER6_CLKCTRL AM4_CLKCTRL_INDEX(0x550)
#define AM4_TIMER7_CLKCTRL AM4_CLKCTRL_INDEX(0x558)
#define AM4_TIMER8_CLKCTRL AM4_CLKCTRL_INDEX(0x560)
#define AM4_TIMER9_CLKCTRL AM4_CLKCTRL_INDEX(0x568)
#define AM4_TIMER10_CLKCTRL AM4_CLKCTRL_INDEX(0x570)
#define AM4_TIMER11_CLKCTRL AM4_CLKCTRL_INDEX(0x578)
#define AM4_UART2_CLKCTRL AM4_CLKCTRL_INDEX(0x580)
#define AM4_UART3_CLKCTRL AM4_CLKCTRL_INDEX(0x588)
#define AM4_UART4_CLKCTRL AM4_CLKCTRL_INDEX(0x590)
#define AM4_UART5_CLKCTRL AM4_CLKCTRL_INDEX(0x598)
#define AM4_UART6_CLKCTRL AM4_CLKCTRL_INDEX(0x5a0)
#define AM4_OCP2SCP0_CLKCTRL AM4_CLKCTRL_INDEX(0x5b8)
#define AM4_OCP2SCP1_CLKCTRL AM4_CLKCTRL_INDEX(0x5c0)
#define AM4_EMIF_CLKCTRL AM4_CLKCTRL_INDEX(0x720)
#define AM4_DSS_CORE_CLKCTRL AM4_CLKCTRL_INDEX(0xa20)
#define AM4_CPGMAC0_CLKCTRL AM4_CLKCTRL_INDEX(0xb20)

/* XXX: Compatibility part end. */

/* l3s_tsc clocks */
#define AM4_L3S_TSC_CLKCTRL_OFFSET 0x120
#define AM4_L3S_TSC_CLKCTRL_INDEX(offset) ((offset) - AM4_L3S_TSC_CLKCTRL_OFFSET)
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