Skip to content

Commit

Permalink
perf: Convert perf_event to local_t
Browse files Browse the repository at this point in the history 
Since now all modification to event->count (and ->prev_count
and ->period_left) are local to a cpu, change then to local64_t so we
avoid the LOCK'ed ops.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
  • Loading branch information
Peter Zijlstra authored and Ingo Molnar committed Jun 9, 2010
1 parent a6e6dea commit e785059
Show file tree
Hide file tree
Showing 7 changed files with 72 additions and 71 deletions.
18 changes: 9 additions & 9 deletions arch/arm/kernel/perf_event.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -164,28 +164,28 @@ armpmu_event_set_period(struct perf_event *event,
struct hw_perf_event *hwc,
int idx)
{
s64 left = atomic64_read(&hwc->period_left);
s64 left = local64_read(&hwc->period_left);
s64 period = hwc->sample_period;
int ret = 0;

if (unlikely(left <= -period)) {
left = period;
atomic64_set(&hwc->period_left, left);
local64_set(&hwc->period_left, left);
hwc->last_period = period;
ret = 1;
}

if (unlikely(left <= 0)) {
left += period;
atomic64_set(&hwc->period_left, left);
local64_set(&hwc->period_left, left);
hwc->last_period = period;
ret = 1;
}

if (left > (s64)armpmu->max_period)
left = armpmu->max_period;

atomic64_set(&hwc->prev_count, (u64)-left);
local64_set(&hwc->prev_count, (u64)-left);

armpmu->write_counter(idx, (u64)(-left) & 0xffffffff);

Expand All @@ -204,18 +204,18 @@ armpmu_event_update(struct perf_event *event,
s64 delta;

again:
prev_raw_count = atomic64_read(&hwc->prev_count);
prev_raw_count = local64_read(&hwc->prev_count);
new_raw_count = armpmu->read_counter(idx);

if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
new_raw_count) != prev_raw_count)
goto again;

delta = (new_raw_count << shift) - (prev_raw_count << shift);
delta >>= shift;

atomic64_add(delta, &event->count);
atomic64_sub(delta, &hwc->period_left);
local64_add(delta, &event->count);
local64_sub(delta, &hwc->period_left);

return new_raw_count;
}
Expand Down Expand Up @@ -478,7 +478,7 @@ __hw_perf_event_init(struct perf_event *event)
if (!hwc->sample_period) {
hwc->sample_period = armpmu->max_period;
hwc->last_period = hwc->sample_period;
atomic64_set(&hwc->period_left, hwc->sample_period);
local64_set(&hwc->period_left, hwc->sample_period);
}

err = 0;
Expand Down
34 changes: 17 additions & 17 deletions arch/powerpc/kernel/perf_event.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -410,15 +410,15 @@ static void power_pmu_read(struct perf_event *event)
* Therefore we treat them like NMIs.
*/
do {
prev = atomic64_read(&event->hw.prev_count);
prev = local64_read(&event->hw.prev_count);
barrier();
val = read_pmc(event->hw.idx);
} while (atomic64_cmpxchg(&event->hw.prev_count, prev, val) != prev);
} while (local64_cmpxchg(&event->hw.prev_count, prev, val) != prev);

/* The counters are only 32 bits wide */
delta = (val - prev) & 0xfffffffful;
atomic64_add(delta, &event->count);
atomic64_sub(delta, &event->hw.period_left);
local64_add(delta, &event->count);
local64_sub(delta, &event->hw.period_left);
}

/*
Expand All @@ -444,10 +444,10 @@ static void freeze_limited_counters(struct cpu_hw_events *cpuhw,
if (!event->hw.idx)
continue;
val = (event->hw.idx == 5) ? pmc5 : pmc6;
prev = atomic64_read(&event->hw.prev_count);
prev = local64_read(&event->hw.prev_count);
event->hw.idx = 0;
delta = (val - prev) & 0xfffffffful;
atomic64_add(delta, &event->count);
local64_add(delta, &event->count);
}
}

Expand All @@ -462,7 +462,7 @@ static void thaw_limited_counters(struct cpu_hw_events *cpuhw,
event = cpuhw->limited_counter[i];
event->hw.idx = cpuhw->limited_hwidx[i];
val = (event->hw.idx == 5) ? pmc5 : pmc6;
atomic64_set(&event->hw.prev_count, val);
local64_set(&event->hw.prev_count, val);
perf_event_update_userpage(event);
}
}
Expand Down Expand Up @@ -666,11 +666,11 @@ void hw_perf_enable(void)
}
val = 0;
if (event->hw.sample_period) {
left = atomic64_read(&event->hw.period_left);
left = local64_read(&event->hw.period_left);
if (left < 0x80000000L)
val = 0x80000000L - left;
}
atomic64_set(&event->hw.prev_count, val);
local64_set(&event->hw.prev_count, val);
event->hw.idx = idx;
write_pmc(idx, val);
perf_event_update_userpage(event);
Expand Down Expand Up @@ -842,8 +842,8 @@ static void power_pmu_unthrottle(struct perf_event *event)
if (left < 0x80000000L)
val = 0x80000000L - left;
write_pmc(event->hw.idx, val);
atomic64_set(&event->hw.prev_count, val);
atomic64_set(&event->hw.period_left, left);
local64_set(&event->hw.prev_count, val);
local64_set(&event->hw.period_left, left);
perf_event_update_userpage(event);
perf_enable();
local_irq_restore(flags);
Expand Down Expand Up @@ -1109,7 +1109,7 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
event->hw.config = events[n];
event->hw.event_base = cflags[n];
event->hw.last_period = event->hw.sample_period;
atomic64_set(&event->hw.period_left, event->hw.last_period);
local64_set(&event->hw.period_left, event->hw.last_period);

/*
* See if we need to reserve the PMU.
Expand Down Expand Up @@ -1147,16 +1147,16 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
int record = 0;

/* we don't have to worry about interrupts here */
prev = atomic64_read(&event->hw.prev_count);
prev = local64_read(&event->hw.prev_count);
delta = (val - prev) & 0xfffffffful;
atomic64_add(delta, &event->count);
local64_add(delta, &event->count);

/*
* See if the total period for this event has expired,
* and update for the next period.
*/
val = 0;
left = atomic64_read(&event->hw.period_left) - delta;
left = local64_read(&event->hw.period_left) - delta;
if (period) {
if (left <= 0) {
left += period;
Expand Down Expand Up @@ -1194,8 +1194,8 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
}

write_pmc(event->hw.idx, val);
atomic64_set(&event->hw.prev_count, val);
atomic64_set(&event->hw.period_left, left);
local64_set(&event->hw.prev_count, val);
local64_set(&event->hw.period_left, left);
perf_event_update_userpage(event);
}

Expand Down
6 changes: 3 additions & 3 deletions arch/sh/kernel/perf_event.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -185,10 +185,10 @@ static void sh_perf_event_update(struct perf_event *event,
* this is the simplest approach for maintaining consistency.
*/
again:
prev_raw_count = atomic64_read(&hwc->prev_count);
prev_raw_count = local64_read(&hwc->prev_count);
new_raw_count = sh_pmu->read(idx);

if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
new_raw_count) != prev_raw_count)
goto again;

Expand All @@ -203,7 +203,7 @@ static void sh_perf_event_update(struct perf_event *event,
delta = (new_raw_count << shift) - (prev_raw_count << shift);
delta >>= shift;

atomic64_add(delta, &event->count);
local64_add(delta, &event->count);
}

static void sh_pmu_disable(struct perf_event *event)
Expand Down
18 changes: 9 additions & 9 deletions arch/sparc/kernel/perf_event.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -572,46 +572,46 @@ static u64 sparc_perf_event_update(struct perf_event *event,
s64 delta;

again:
prev_raw_count = atomic64_read(&hwc->prev_count);
prev_raw_count = local64_read(&hwc->prev_count);
new_raw_count = read_pmc(idx);

if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
new_raw_count) != prev_raw_count)
goto again;

delta = (new_raw_count << shift) - (prev_raw_count << shift);
delta >>= shift;

atomic64_add(delta, &event->count);
atomic64_sub(delta, &hwc->period_left);
local64_add(delta, &event->count);
local64_sub(delta, &hwc->period_left);

return new_raw_count;
}

static int sparc_perf_event_set_period(struct perf_event *event,
struct hw_perf_event *hwc, int idx)
{
s64 left = atomic64_read(&hwc->period_left);
s64 left = local64_read(&hwc->period_left);
s64 period = hwc->sample_period;
int ret = 0;

if (unlikely(left <= -period)) {
left = period;
atomic64_set(&hwc->period_left, left);
local64_set(&hwc->period_left, left);
hwc->last_period = period;
ret = 1;
}

if (unlikely(left <= 0)) {
left += period;
atomic64_set(&hwc->period_left, left);
local64_set(&hwc->period_left, left);
hwc->last_period = period;
ret = 1;
}
if (left > MAX_PERIOD)
left = MAX_PERIOD;

atomic64_set(&hwc->prev_count, (u64)-left);
local64_set(&hwc->prev_count, (u64)-left);

write_pmc(idx, (u64)(-left) & 0xffffffff);

Expand Down Expand Up @@ -1087,7 +1087,7 @@ static int __hw_perf_event_init(struct perf_event *event)
if (!hwc->sample_period) {
hwc->sample_period = MAX_PERIOD;
hwc->last_period = hwc->sample_period;
atomic64_set(&hwc->period_left, hwc->sample_period);
local64_set(&hwc->period_left, hwc->sample_period);
}

return 0;
Expand Down
18 changes: 9 additions & 9 deletions arch/x86/kernel/cpu/perf_event.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -296,10 +296,10 @@ x86_perf_event_update(struct perf_event *event)
* count to the generic event atomically:
*/
again:
prev_raw_count = atomic64_read(&hwc->prev_count);
prev_raw_count = local64_read(&hwc->prev_count);
rdmsrl(hwc->event_base + idx, new_raw_count);

if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
new_raw_count) != prev_raw_count)
goto again;

Expand All @@ -314,8 +314,8 @@ x86_perf_event_update(struct perf_event *event)
delta = (new_raw_count << shift) - (prev_raw_count << shift);
delta >>= shift;

atomic64_add(delta, &event->count);
atomic64_sub(delta, &hwc->period_left);
local64_add(delta, &event->count);
local64_sub(delta, &hwc->period_left);

return new_raw_count;
}
Expand Down Expand Up @@ -439,7 +439,7 @@ static int x86_setup_perfctr(struct perf_event *event)
if (!hwc->sample_period) {
hwc->sample_period = x86_pmu.max_period;
hwc->last_period = hwc->sample_period;
atomic64_set(&hwc->period_left, hwc->sample_period);
local64_set(&hwc->period_left, hwc->sample_period);
} else {
/*
* If we have a PMU initialized but no APIC
Expand Down Expand Up @@ -886,7 +886,7 @@ static int
x86_perf_event_set_period(struct perf_event *event)
{
struct hw_perf_event *hwc = &event->hw;
s64 left = atomic64_read(&hwc->period_left);
s64 left = local64_read(&hwc->period_left);
s64 period = hwc->sample_period;
int ret = 0, idx = hwc->idx;

Expand All @@ -898,14 +898,14 @@ x86_perf_event_set_period(struct perf_event *event)
*/
if (unlikely(left <= -period)) {
left = period;
atomic64_set(&hwc->period_left, left);
local64_set(&hwc->period_left, left);
hwc->last_period = period;
ret = 1;
}

if (unlikely(left <= 0)) {
left += period;
atomic64_set(&hwc->period_left, left);
local64_set(&hwc->period_left, left);
hwc->last_period = period;
ret = 1;
}
Expand All @@ -924,7 +924,7 @@ x86_perf_event_set_period(struct perf_event *event)
* The hw event starts counting from this event offset,
* mark it to be able to extra future deltas:
*/
atomic64_set(&hwc->prev_count, (u64)-left);
local64_set(&hwc->prev_count, (u64)-left);

wrmsrl(hwc->event_base + idx, (u64)(-left) & x86_pmu.cntval_mask);

Expand Down
7 changes: 4 additions & 3 deletions include/linux/perf_event.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -487,6 +487,7 @@ struct perf_guest_info_callbacks {
#include <linux/cpu.h>
#include <asm/atomic.h>
#include <asm/local.h>
#include <asm/local64.h>

#define PERF_MAX_STACK_DEPTH 255

Expand Down Expand Up @@ -536,10 +537,10 @@ struct hw_perf_event {
struct arch_hw_breakpoint info;
#endif
};
atomic64_t prev_count;
local64_t prev_count;
u64 sample_period;
u64 last_period;
atomic64_t period_left;
local64_t period_left;
u64 interrupts;

u64 freq_time_stamp;
Expand Down Expand Up @@ -670,7 +671,7 @@ struct perf_event {

enum perf_event_active_state state;
unsigned int attach_state;
atomic64_t count;
local64_t count;
atomic64_t child_count;

/*
Expand Down
Loading

0 comments on commit e785059

Please sign in to comment.