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r8169: remove support for RTL_GIGA_MAC_VER_01
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RTL_GIGA_MAC_VER_01 is RTL8169, the ancestor of the chip family.
It didn't have an internal PHY and I've never seen it in the wild.
What isn't there doesn't need to be maintained, so let's remove
support for it.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Heiner Kallweit authored and David S. Miller committed May 27, 2019
1 parent fcb40e1 commit e9588eb
Showing 1 changed file with 9 additions and 34 deletions.
43 changes: 9 additions & 34 deletions drivers/net/ethernet/realtek/r8169.c
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Original file line number Diff line number Diff line change
Expand Up @@ -81,7 +81,7 @@ static const int multicast_filter_limit = 32;
#define RTL_R32(tp, reg) readl(tp->mmio_addr + (reg))

enum mac_version {
RTL_GIGA_MAC_VER_01 = 0,
/* support for ancient RTL_GIGA_MAC_VER_01 has been removed */
RTL_GIGA_MAC_VER_02,
RTL_GIGA_MAC_VER_03,
RTL_GIGA_MAC_VER_04,
Expand Down Expand Up @@ -146,7 +146,6 @@ static const struct {
const char *fw_name;
} rtl_chip_infos[] = {
/* PCI devices. */
[RTL_GIGA_MAC_VER_01] = {"RTL8169" },
[RTL_GIGA_MAC_VER_02] = {"RTL8169s" },
[RTL_GIGA_MAC_VER_03] = {"RTL8110s" },
[RTL_GIGA_MAC_VER_04] = {"RTL8169sb/8110sb" },
Expand Down Expand Up @@ -406,8 +405,6 @@ enum rtl_register_content {
RxOK = 0x0001,

/* RxStatusDesc */
RxBOVF = (1 << 24),
RxFOVF = (1 << 23),
RxRWT = (1 << 22),
RxRES = (1 << 21),
RxRUNT = (1 << 20),
Expand Down Expand Up @@ -503,9 +500,6 @@ enum rtl_register_content {
LinkStatus = 0x02,
FullDup = 0x01,

/* _TBICSRBit */
TBILinkOK = 0x02000000,

/* ResetCounterCommand */
CounterReset = 0x1,

Expand Down Expand Up @@ -1424,7 +1418,7 @@ static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
}

switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_01 ... RTL_GIGA_MAC_VER_17:
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_17:
options = RTL_R8(tp, Config1) & ~PMEnable;
if (wolopts)
options |= PMEnable;
Expand Down Expand Up @@ -2252,7 +2246,6 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp)
{ 0xfc8, 0x100, RTL_GIGA_MAC_VER_04 },
{ 0xfc8, 0x040, RTL_GIGA_MAC_VER_03 },
{ 0xfc8, 0x008, RTL_GIGA_MAC_VER_02 },
{ 0xfc8, 0x000, RTL_GIGA_MAC_VER_01 },

/* Catch-all */
{ 0x000, 0x000, RTL_GIGA_MAC_NONE }
Expand Down Expand Up @@ -3936,7 +3929,6 @@ static void rtl_hw_phy_config(struct net_device *dev)
{
static const rtl_generic_fct phy_configs[] = {
/* PCI devices. */
[RTL_GIGA_MAC_VER_01] = NULL,
[RTL_GIGA_MAC_VER_02] = rtl8169s_hw_phy_config,
[RTL_GIGA_MAC_VER_03] = rtl8169s_hw_phy_config,
[RTL_GIGA_MAC_VER_04] = rtl8169sb_hw_phy_config,
Expand Down Expand Up @@ -4001,12 +3993,6 @@ static void rtl_schedule_task(struct rtl8169_private *tp, enum rtl_flag flag)
schedule_work(&tp->wk.work);
}

static bool rtl_tbi_enabled(struct rtl8169_private *tp)
{
return (tp->mac_version == RTL_GIGA_MAC_VER_01) &&
(RTL_R8(tp, PHYstatus) & TBI_Enable);
}

static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
{
rtl_hw_phy_config(dev);
Expand Down Expand Up @@ -4195,7 +4181,7 @@ static void r8168_pll_power_up(struct rtl8169_private *tp)
static void rtl_pll_power_down(struct rtl8169_private *tp)
{
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_01 ... RTL_GIGA_MAC_VER_06:
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
case RTL_GIGA_MAC_VER_13 ... RTL_GIGA_MAC_VER_15:
break;
default:
Expand All @@ -4206,7 +4192,7 @@ static void rtl_pll_power_down(struct rtl8169_private *tp)
static void rtl_pll_power_up(struct rtl8169_private *tp)
{
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_01 ... RTL_GIGA_MAC_VER_06:
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
case RTL_GIGA_MAC_VER_13 ... RTL_GIGA_MAC_VER_15:
break;
default:
Expand All @@ -4217,7 +4203,7 @@ static void rtl_pll_power_up(struct rtl8169_private *tp)
static void rtl_init_rxcfg(struct rtl8169_private *tp)
{
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_01 ... RTL_GIGA_MAC_VER_06:
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
case RTL_GIGA_MAC_VER_10 ... RTL_GIGA_MAC_VER_17:
RTL_W32(tp, RxConfig, RX_FIFO_THRESH | RX_DMA_BURST);
break;
Expand Down Expand Up @@ -6219,14 +6205,8 @@ static int rtl_rx(struct net_device *dev, struct rtl8169_private *tp, u32 budget
dev->stats.rx_length_errors++;
if (status & RxCRC)
dev->stats.rx_crc_errors++;
/* RxFOVF is a reserved bit on later chip versions */
if (tp->mac_version == RTL_GIGA_MAC_VER_01 &&
status & RxFOVF) {
rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
dev->stats.rx_fifo_errors++;
} else if (status & (RxRUNT | RxCRC) &&
!(status & RxRWT) &&
dev->features & NETIF_F_RXALL) {
if (status & (RxRUNT | RxCRC) && !(status & RxRWT) &&
dev->features & NETIF_F_RXALL) {
goto process_pkt;
}
} else {
Expand Down Expand Up @@ -7019,7 +6999,7 @@ static void rtl_hw_initialize(struct rtl8169_private *tp)
static bool rtl_chip_supports_csum_v2(struct rtl8169_private *tp)
{
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_01 ... RTL_GIGA_MAC_VER_06:
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
case RTL_GIGA_MAC_VER_10 ... RTL_GIGA_MAC_VER_17:
return false;
default:
Expand All @@ -7035,7 +7015,7 @@ static int rtl_jumbo_max(struct rtl8169_private *tp)

switch (tp->mac_version) {
/* RTL8169 */
case RTL_GIGA_MAC_VER_01 ... RTL_GIGA_MAC_VER_06:
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
return JUMBO_7K;
/* RTL8168b */
case RTL_GIGA_MAC_VER_11:
Expand Down Expand Up @@ -7149,11 +7129,6 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
if (tp->mac_version == RTL_GIGA_MAC_NONE)
return -ENODEV;

if (rtl_tbi_enabled(tp)) {
dev_err(&pdev->dev, "TBI fiber mode not supported\n");
return -ENODEV;
}

tp->cp_cmd = RTL_R16(tp, CPlusCmd);

if (sizeof(dma_addr_t) > 4 && tp->mac_version >= RTL_GIGA_MAC_VER_18 &&
Expand Down

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