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Merge tag 'staging-5.15-rc1' of git://git.kernel.org/pub/scm/linux/ke…
…rnel/git/gregkh/staging Pull IIO and staging driver updates from Greg KH: "Here is the big set of staging and IIO driver updates for 5.15-rc1. Also included in here are the counter driver subsystem updates as the IIO drivers needed them. Lots of churn in some staging drivers, we dropped the "old" rtl8188eu driver and replaced it with a newer version of the driver that had been maintained out-of-tree by Larry with the end goal of actually being able to get this driver out of staging eventually. Despite that driver being "newer" the line count of this pull request is going up. Some drivers moved out of staging as well, which is always nice to see, that is why there are additions to the mfc and misc driver subsystems. All of these were acked by the various subsystem maintainers involved. But by far, as normal, it's coding style cleanups all over the drivers/staging/ tree in here. Full details of these changes are in the shortlog. All of these have been in linux-next for a while with no reported problems" [ Note: the r8188eu merge clashed with commit 89939e8 ("staging: rtlwifi: use siocdevprivate") from the networking tree. When resolving the issue, I noted that the whole r8188eu rtw_android code is dead since commit ae7471c ("staging: r8188eu: remove rtw_ioctl function"). End result: the merge resolution was to throw all of that away, rather than do the mindless fixup to code that isn't actually reachable - Linus ] * tag 'staging-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (551 commits) staging: vt6655: Remove filenames in files staging: r8188eu: add extra TODO entries staging: vt6656: Remove filenames in files staging: wlan-ng: fix invalid assignment warning staging: r8188eu: rename fields of struct rtl_ps staging: r8188eu: remove ODM_DynamicPrimaryCCA_DupRTS() staging: r8188eu: rename fields of struct dyn_primary_cca staging: r8188eu: rename struct field Wifi_Error_Status staging: r8188eu: Provide a TODO file for this driver staging: r8188eu: remove unneeded variable staging: r8188eu: remove unneeded conversions to bool staging: r8188eu: remove {read,write}_macreg staging: r8188eu: core: remove condition with no effect staging: r8188eu: remove ethernet.h header file staging: r8188eu: remove ip.h header file staging: r8188eu: remove if_ether.h header file staging: r8188eu: make rtw_deinit_intf_priv return void staging: r8188eu: use is_multicast_ether_addr in os_dep/recv_linux.c staging: r8188eu: use is_multicast_ether_addr in hal/rtl8188eu_xmit.c staging: r8188eu: use is_multicast_ether_addr in core/rtw_xmit.c ...
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| What: /sys/bus/iio/devices/iio:deviceX/out_temp_raw | ||
| Date: August 2021 | ||
| KernelVersion: 5.15 | ||
| Contact: Andreas Klinger <ak@it-klinger.de> | ||
| Description: | ||
| Set the temperature. This value is sent to the sensor for | ||
| temperature compensation. | ||
| Default value: 25000 (25 °C) | ||
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| What: /sys/bus/iio/devices/iio:deviceX/out_humidityrelative_raw | ||
| Date: August 2021 | ||
| KernelVersion: 5.15 | ||
| Contact: Andreas Klinger <ak@it-klinger.de> | ||
| Description: | ||
| Set the relative humidity. This value is sent to the sensor for | ||
| humidity compensation. | ||
| Default value: 50000 (50 % relative humidity) | ||
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| What: /sys/bus/iio/devices/iio:deviceX/in_resistance_calibbias | ||
| Date: August 2021 | ||
| KernelVersion: 5.15 | ||
| Contact: Andreas Klinger <ak@it-klinger.de> | ||
| Description: | ||
| Set the bias value for the resistance which is used for | ||
| calculation of in_concentration_input as follows: | ||
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| x = (in_resistance_raw - in_resistance_calibbias) * 0.65 | ||
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| in_concentration_input = 500 / (1 + e^x) | ||
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| Default value: 30000 |
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Documentation/devicetree/bindings/iio/accel/bosch,bma180.yaml
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Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
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| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
| %YAML 1.2 | ||
| --- | ||
| $id: http://devicetree.org/schemas/iio/adc/renesas,rzg2l-adc.yaml# | ||
| $schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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| title: Renesas RZ/G2L ADC | ||
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| maintainers: | ||
| - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | ||
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| description: | | ||
| A/D Converter block is a successive approximation analog-to-digital converter | ||
| with a 12-bit accuracy. Up to eight analog input channels can be selected. | ||
| Conversions can be performed in single or repeat mode. Result of the ADC is | ||
| stored in a 32-bit data register corresponding to each channel. | ||
| properties: | ||
| compatible: | ||
| items: | ||
| - enum: | ||
| - renesas,r9a07g044-adc # RZ/G2{L,LC} | ||
| - const: renesas,rzg2l-adc | ||
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| reg: | ||
| maxItems: 1 | ||
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| interrupts: | ||
| maxItems: 1 | ||
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| clocks: | ||
| items: | ||
| - description: converter clock | ||
| - description: peripheral clock | ||
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| clock-names: | ||
| items: | ||
| - const: adclk | ||
| - const: pclk | ||
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| power-domains: | ||
| maxItems: 1 | ||
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| resets: | ||
| maxItems: 2 | ||
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| reset-names: | ||
| items: | ||
| - const: presetn | ||
| - const: adrst-n | ||
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| '#address-cells': | ||
| const: 1 | ||
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| '#size-cells': | ||
| const: 0 | ||
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| required: | ||
| - compatible | ||
| - reg | ||
| - interrupts | ||
| - clocks | ||
| - clock-names | ||
| - power-domains | ||
| - resets | ||
| - reset-names | ||
|
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| patternProperties: | ||
| "^channel@[0-7]$": | ||
| $ref: "adc.yaml" | ||
| type: object | ||
| description: | | ||
| Represents the external channels which are connected to the ADC. | ||
| properties: | ||
| reg: | ||
| description: | | ||
| The channel number. It can have up to 8 channels numbered from 0 to 7. | ||
| items: | ||
| - minimum: 0 | ||
| maximum: 7 | ||
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| required: | ||
| - reg | ||
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| additionalProperties: false | ||
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| additionalProperties: false | ||
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| examples: | ||
| - | | ||
| #include <dt-bindings/clock/r9a07g044-cpg.h> | ||
| #include <dt-bindings/interrupt-controller/arm-gic.h> | ||
| adc: adc@10059000 { | ||
| compatible = "renesas,r9a07g044-adc", "renesas,rzg2l-adc"; | ||
| reg = <0x10059000 0x400>; | ||
| interrupts = <GIC_SPI 347 IRQ_TYPE_EDGE_RISING>; | ||
| clocks = <&cpg CPG_MOD R9A07G044_ADC_ADCLK>, | ||
| <&cpg CPG_MOD R9A07G044_ADC_PCLK>; | ||
| clock-names = "adclk", "pclk"; | ||
| power-domains = <&cpg>; | ||
| resets = <&cpg R9A07G044_ADC_PRESETN>, | ||
| <&cpg R9A07G044_ADC_ADRST_N>; | ||
| reset-names = "presetn", "adrst-n"; | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| channel@0 { | ||
| reg = <0>; | ||
| }; | ||
| channel@1 { | ||
| reg = <1>; | ||
| }; | ||
| channel@2 { | ||
| reg = <2>; | ||
| }; | ||
| channel@3 { | ||
| reg = <3>; | ||
| }; | ||
| channel@4 { | ||
| reg = <4>; | ||
| }; | ||
| channel@5 { | ||
| reg = <5>; | ||
| }; | ||
| channel@6 { | ||
| reg = <6>; | ||
| }; | ||
| channel@7 { | ||
| reg = <7>; | ||
| }; | ||
| }; |
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