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drm/i915: Remove implicitly disabling primary plane for now
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Some of the flags that were used are still useful when transitioning
to atomic, so keep those around for now. This removes some of the
complications of crtc->primary_enabled, making it easier to remove.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Maarten Lankhorst authored and Daniel Vetter committed May 8, 2015
1 parent eb3394f commit ecce87e
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Showing 2 changed files with 1 addition and 50 deletions.
6 changes: 0 additions & 6 deletions drivers/gpu/drm/i915/intel_drv.h
Original file line number Diff line number Diff line change
Expand Up @@ -248,12 +248,6 @@ struct intel_plane_state {
struct drm_rect clip;
bool visible;

/*
* used only for sprite planes to determine when to implicitly
* enable/disable the primary plane
*/
bool hides_primary;

/*
* scaler_id
* = -1 : not using a scaler
Expand Down
45 changes: 1 addition & 44 deletions drivers/gpu/drm/i915/intel_sprite.c
Original file line number Diff line number Diff line change
Expand Up @@ -166,17 +166,6 @@ void intel_pipe_update_end(struct intel_crtc *crtc, u32 start_vbl_count)
pipe_name(pipe), start_vbl_count, end_vbl_count);
}

static void intel_update_primary_plane(struct intel_crtc *crtc)
{
struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
int reg = DSPCNTR(crtc->plane);

if (crtc->primary_enabled)
I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);
else
I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE);
}

static void
skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc,
struct drm_framebuffer *fb,
Expand Down Expand Up @@ -438,8 +427,6 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
linear_offset += src_h * fb->pitches[0] + src_w * pixel_size;
}

intel_update_primary_plane(intel_crtc);

if (key->flags) {
I915_WRITE(SPKEYMINVAL(pipe, plane), key->min_value);
I915_WRITE(SPKEYMAXVAL(pipe, plane), key->max_value);
Expand Down Expand Up @@ -480,8 +467,6 @@ vlv_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
int pipe = intel_plane->pipe;
int plane = intel_plane->plane;

intel_update_primary_plane(intel_crtc);

I915_WRITE(SPCNTR(pipe, plane), 0);

/* Activate double buffered register update */
Expand Down Expand Up @@ -585,8 +570,6 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
}
}

intel_update_primary_plane(intel_crtc);

if (key->flags) {
I915_WRITE(SPRKEYVAL(pipe), key->min_value);
I915_WRITE(SPRKEYMAX(pipe), key->max_value);
Expand Down Expand Up @@ -629,8 +612,6 @@ ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_plane->pipe;

intel_update_primary_plane(intel_crtc);

I915_WRITE(SPRCTL(pipe), I915_READ(SPRCTL(pipe)) & ~SPRITE_ENABLE);
/* Can't leave the scaler enabled... */
if (intel_plane->can_scale)
Expand Down Expand Up @@ -725,8 +706,6 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
linear_offset += src_h * fb->pitches[0] + src_w * pixel_size;
}

intel_update_primary_plane(intel_crtc);

if (key->flags) {
I915_WRITE(DVSKEYVAL(pipe), key->min_value);
I915_WRITE(DVSKEYMAX(pipe), key->max_value);
Expand Down Expand Up @@ -764,8 +743,6 @@ ilk_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_plane->pipe;

intel_update_primary_plane(intel_crtc);

I915_WRITE(DVSCNTR(pipe), 0);
/* Disable the scaler */
I915_WRITE(DVSSCALE(pipe), 0);
Expand Down Expand Up @@ -818,7 +795,7 @@ intel_post_enable_primary(struct drm_crtc *crtc)
* @crtc: the CRTC whose primary plane is to be disabled
*
* Performs potentially sleeping operations that must be done before the
* primary plane is enabled, such as updating FBC and IPS. Note that this may
* primary plane is disabled, such as updating FBC and IPS. Note that this may
* be called due to an explicit primary plane update, or due to an implicit
* disable that is caused when a sprite plane completely hides the primary
* plane.
Expand All @@ -844,11 +821,6 @@ intel_pre_disable_primary(struct drm_crtc *crtc)
hsw_disable_ips(intel_crtc);
}

static bool colorkey_enabled(struct intel_plane *intel_plane)
{
return intel_plane->ckey.flags != I915_SET_COLORKEY_NONE;
}

static int
intel_check_sprite_plane(struct drm_plane *plane,
struct intel_plane_state *state)
Expand Down Expand Up @@ -1022,23 +994,10 @@ intel_check_sprite_plane(struct drm_plane *plane,
* If the sprite is completely covering the primary plane,
* we can disable the primary and save power.
*/
state->hides_primary = fb != NULL && drm_rect_equals(dst, clip) &&
!colorkey_enabled(intel_plane);
WARN_ON(state->hides_primary && !state->visible && intel_crtc->active);

if (intel_crtc->active) {
if (intel_crtc->primary_enabled == state->hides_primary)
intel_crtc->atomic.wait_for_flips = true;

if (intel_crtc->primary_enabled && state->hides_primary)
intel_crtc->atomic.pre_disable_primary = true;

intel_crtc->atomic.fb_bits |=
INTEL_FRONTBUFFER_SPRITE(intel_crtc->pipe);

if (!intel_crtc->primary_enabled && !state->hides_primary)
intel_crtc->atomic.post_enable_primary = true;

if (intel_wm_need_update(plane, &state->base))
intel_crtc->atomic.update_wm = true;

Expand Down Expand Up @@ -1081,8 +1040,6 @@ intel_commit_sprite_plane(struct drm_plane *plane,
plane->fb = fb;

if (intel_crtc->active) {
intel_crtc->primary_enabled = !state->hides_primary;

if (state->visible) {
crtc_x = state->dst.x1;
crtc_y = state->dst.y1;
Expand Down

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