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dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle
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The Rockchip DMC (Dynamic Memory Interface) needs to access to the PMU
general register files to know the DRAM type, so add a phandle to the
syscon that manages these registers.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
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Enric Balletbo i Serra authored and Chanwoo Choi committed Jul 30, 2020
1 parent 2494847 commit ed27952
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2 changes: 2 additions & 0 deletions Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
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Expand Up @@ -18,6 +18,8 @@ Optional properties:
format depends on the interrupt controller.
It should be a DCF interrupt. When DDR DVFS finishes
a DCF interrupt is triggered.
- rockchip,pmu: Phandle to the syscon managing the "PMU general register
files".

Following properties relate to DDR timing:

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