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Merge tag 'amd-drm-next-5.20-2022-07-26' of https://gitlab.freedeskto…
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…p.org/agd5f/linux into drm-next

amdgpu:
- VCN4 fixes
- RAS support for UMC 8.10
- ACP support for jadeite platforms
- NBIO HDP flush fixes
- Misc spelling and grammar fixes
- Runtime PM fixes
- Non-DC HPD fix
- Clean up amdgpu DM code
- DSC fixes
- Expose some additional GFXOFF data via debugfs
- More FP clean up for new DCN blocks
- PPC DC FP fixes
- DCN 3.1.4 fixes
- DC DML stack usage fixes
- GMC fixes
- SPM fixes for RDNA2

amdkfd:
- MMU notifier fix
- Mutex fix

UAPI:
- Add a comment about VCN4 unified queues
- IP version information for UMDs
  Proposed mesa change: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411/diffs?commit_id=c8a63590dfd0d64e6e6a634dcfed993f135dd075

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220726181536.5759-1-alexander.deucher@amd.com
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Dave Airlie committed Jul 26, 2022
2 parents 417c1c1 + 1b54a01 commit ee8b1ef
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Showing 167 changed files with 9,847 additions and 7,212 deletions.
41 changes: 41 additions & 0 deletions Documentation/gpu/amdgpu/thermal.rst
Original file line number Diff line number Diff line change
Expand Up @@ -63,3 +63,44 @@ gpu_metrics

.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c
:doc: gpu_metrics

GFXOFF
======

GFXOFF is a feature found in most recent GPUs that saves power at runtime. The
card's RLC (RunList Controller) firmware powers off the gfx engine
dynamically when there is no workload on gfx or compute pipes. GFXOFF is on by
default on supported GPUs.

Userspace can interact with GFXOFF through a debugfs interface:

``amdgpu_gfxoff``
-----------------

Use it to enable/disable GFXOFF, and to check if it's current enabled/disabled::

$ xxd -l1 -p /sys/kernel/debug/dri/0/amdgpu_gfxoff
01

- Write 0 to disable it, and 1 to enable it.
- Read 0 means it's disabled, 1 it's enabled.

If it's enabled, that means that the GPU is free to enter into GFXOFF mode as
needed. Disabled means that it will never enter GFXOFF mode.

``amdgpu_gfxoff_status``
------------------------

Read it to check current GFXOFF's status of a GPU::

$ xxd -l1 -p /sys/kernel/debug/dri/0/amdgpu_gfxoff_status
02

- 0: GPU is in GFXOFF state, the gfx engine is powered down.
- 1: Transition out of GFXOFF state
- 2: Not in GFXOFF state
- 3: Transition into GFXOFF state

If GFXOFF is enabled, the value will be transitioning around [0, 3], always
getting into 0 when possible. When it's disabled, it's always at 2. Returns
``-EINVAL`` if it's not supported.
5 changes: 3 additions & 2 deletions drivers/gpu/drm/amd/amdgpu/Kconfig
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Expand Up @@ -4,7 +4,7 @@ config DRM_AMDGPU_SI
depends on DRM_AMDGPU
help
Choose this option if you want to enable experimental support
for SI asics.
for SI (Southern Islands) asics.

SI is already supported in radeon. Experimental support for SI
in amdgpu will be disabled by default and is still provided by
Expand All @@ -16,7 +16,8 @@ config DRM_AMDGPU_CIK
bool "Enable amdgpu support for CIK parts"
depends on DRM_AMDGPU
help
Choose this option if you want to enable support for CIK asics.
Choose this option if you want to enable support for CIK (Sea
Islands) asics.

CIK is already supported in radeon. Support for CIK in amdgpu
will be disabled by default and is still provided by radeon.
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2 changes: 1 addition & 1 deletion drivers/gpu/drm/amd/amdgpu/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -93,7 +93,7 @@ amdgpu-y += \

# add UMC block
amdgpu-y += \
umc_v6_0.o umc_v6_1.o umc_v6_7.o umc_v8_7.o
umc_v6_0.o umc_v6_1.o umc_v6_7.o umc_v8_7.o umc_v8_10.o

# add IH block
amdgpu-y += \
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2 changes: 1 addition & 1 deletion drivers/gpu/drm/amd/amdgpu/amdgpu.h
Original file line number Diff line number Diff line change
Expand Up @@ -197,6 +197,7 @@ extern uint amdgpu_smu_memory_pool_size;
extern int amdgpu_smu_pptable_id;
extern uint amdgpu_dc_feature_mask;
extern uint amdgpu_dc_debug_mask;
extern uint amdgpu_dc_visual_confirm;
extern uint amdgpu_dm_abm_level;
extern int amdgpu_backlight;
extern struct amdgpu_mgpu_info mgpu_info;
Expand Down Expand Up @@ -1011,7 +1012,6 @@ struct amdgpu_device {
uint64_t df_perfmon_config_assign_mask[AMDGPU_MAX_DF_PERFMONS];

/* enable runtime pm on the device */
bool runpm;
bool in_runpm;
bool has_pr3;

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