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Merge tag 'parisc-for-6.7-rc1' of git://git.kernel.org/pub/scm/linux/…
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…kernel/git/deller/parisc-linux

Pull parisc updates from Helge Deller:
 "Usual fixes and updates:

   - Add up to 12 nops after TLB inserts for PA8x00 CPUs as the
     specification requires (Dave Anglin)

   - Simplify the parisc smp_prepare_boot_cpu() code (Russell King)

   - Use 64-bit little-endian values in SBA IOMMU PDIR table for AGP

  Since there is upcoming support for booting a 64-bit kernel on QEMU,
  some corner cases were fixed and improvements added:

   - Fix 64-bit kernel crash in STI (graphics console) font setup code
     which miscalculated the font start address as it gets signed vs
     unsigned offsets wrong

   - Support building an uncompressed Linux kernel

   - Add support for soft power-off in qemu"

* tag 'parisc-for-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
  fbdev: stifb: Make the STI next font pointer a 32-bit signed offset
  parisc: Show default CPU PSW.W setting as reported by PDC
  parisc/pdc: Add width field to struct pdc_model
  parisc: Add nop instructions after TLB inserts
  parisc: simplify smp_prepare_boot_cpu()
  parisc/agp: Use 64-bit LE values in SBA IOMMU PDIR table
  parisc/firmware: Use PDC constants for narrow/wide firmware
  parisc: Move parisc_narrow_firmware variable to header file
  parisc/power: Trivial whitespace cleanups and license update
  parisc/power: Add power soft-off when running on qemu
  parisc: Allow building uncompressed Linux kernel
  parisc: Add some missing PDC functions and constants
  parisc: sba-iommu: Fix comment when calculating IOC number
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Linus Torvalds committed Nov 1, 2023
2 parents 979ff1e + 8a32aa1 commit f00593e
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Showing 14 changed files with 133 additions and 102 deletions.
1 change: 1 addition & 0 deletions arch/parisc/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@ config PARISC
select INIT_ALL_POSSIBLE
select BUG
select BUILDTIME_TABLE_SORT
select HAVE_KERNEL_UNCOMPRESSED
select HAVE_PCI
select HAVE_PERF_EVENTS
select HAVE_KERNEL_BZIP2
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2 changes: 1 addition & 1 deletion arch/parisc/boot/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ subdir- := compressed
$(obj)/image: vmlinux FORCE
$(call if_changed,objcopy)

$(obj)/bzImage: $(obj)/compressed/vmlinux FORCE
$(obj)/bzImage: $(if $(CONFIG_KERNEL_UNCOMPRESSED),$(objtree)/vmlinux,$(obj)/compressed/vmlinux) FORCE
$(call if_changed,objcopy)

$(obj)/compressed/vmlinux: FORCE
Expand Down
1 change: 1 addition & 0 deletions arch/parisc/include/asm/processor.h
Original file line number Diff line number Diff line change
Expand Up @@ -287,6 +287,7 @@ extern int _parisc_requires_coherency;
#endif

extern int running_on_qemu;
extern int parisc_narrow_firmware;

extern void __noreturn toc_intr(struct pt_regs *regs);
extern void toc_handler(void);
Expand Down
28 changes: 26 additions & 2 deletions arch/parisc/include/uapi/asm/pdc.h
Original file line number Diff line number Diff line change
Expand Up @@ -58,8 +58,8 @@
#define PDC_MODEL_NVA_SUPPORTED (0 << 4)
#define PDC_MODEL_NVA_SLOW (1 << 4)
#define PDC_MODEL_NVA_UNSUPPORTED (3 << 4)
#define PDC_MODEL_GET_BOOT__OP 8 /* returns boot test options */
#define PDC_MODEL_SET_BOOT__OP 9 /* set boot test options */
#define PDC_MODEL_FIRM_TEST_GET 8 /* returns boot test options */
#define PDC_MODEL_FIRM_TEST_SET 9 /* set boot test options */
#define PDC_MODEL_GET_PLATFORM_INFO 10 /* returns platform info */
#define PDC_MODEL_GET_INSTALL_KERNEL 11 /* returns kernel for installation */

Expand Down Expand Up @@ -472,6 +472,7 @@ struct pdc_model { /* for PDC_MODEL */
unsigned long arch_rev;
unsigned long pot_key;
unsigned long curr_key;
unsigned long width; /* default of PSW_W bit (1=enabled) */
};

struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
Expand Down Expand Up @@ -609,6 +610,12 @@ struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
unsigned long mod_pgs;
};

struct pdc_relocate_info_block { /* PDC_RELOCATE_INFO */
unsigned long pdc_size;
unsigned long pdc_alignment;
unsigned long pdc_address;
};

struct pdc_initiator { /* PDC_INITIATOR */
int host_id;
int factor;
Expand Down Expand Up @@ -717,6 +724,23 @@ struct pdc_toc_pim_20 {
struct pim_cpu_state_cf cpu_state;
};

/* for SpeedyBoot/firm_ctl funtionality */
struct pdc_firm_test_get_rtn_block { /* PDC_MODEL/PDC_FIRM_TEST_GET */
unsigned long current_tests; /* u_R_addr Raddr_ints[0] */
unsigned long tests_supported; /* u_R_addr Raddr_ints[1] */
unsigned long default_tests; /* u_R_addr Raddr_ints[2] */
};

#define TORNADO_CPU_ID 0xB
#define PCXL_CPU_ID 0xD
#define PCXU_CPU_ID 0xE /* U and U+ for all but C-class with bug */
#define VR_CPU_ID 0xF
#define PCXU_PLUS_CPU_ID 0x10 /* U+ only on C-class with bug */
#define PCXW_CPU_ID 0x11
#define PCXW_PLUS_CPU_ID 0x12
#define PIRANHA_CPU_ID 0x13
#define MAKO_CPU_ID 0x14

#endif /* !defined(__ASSEMBLY__) */

#endif /* _UAPI_PARISC_PDC_H */
4 changes: 2 additions & 2 deletions arch/parisc/kernel/drivers.c
Original file line number Diff line number Diff line change
Expand Up @@ -927,8 +927,8 @@ static __init void qemu_header(void)

#define p ((unsigned long *)&boot_cpu_data.pdc.model)
pr_info("#define PARISC_PDC_MODEL 0x%lx, 0x%lx, 0x%lx, "
"0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx\n\n",
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
"0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx\n\n",
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8], p[9]);
#undef p

pr_info("#define PARISC_PDC_VERSION 0x%04lx\n\n",
Expand Down
81 changes: 52 additions & 29 deletions arch/parisc/kernel/entry.S
Original file line number Diff line number Diff line change
Expand Up @@ -36,6 +36,24 @@
.level 2.0
#endif

/*
* We need seven instructions after a TLB insert for it to take effect.
* The PA8800/PA8900 processors are an exception and need 12 instructions.
* The RFI changes both IAOQ_Back and IAOQ_Front, so it counts as one.
*/
#ifdef CONFIG_64BIT
#define NUM_PIPELINE_INSNS 12
#else
#define NUM_PIPELINE_INSNS 7
#endif

/* Insert num nops */
.macro insert_nops num
.rept \num
nop
.endr
.endm

/* Get aligned page_table_lock address for this mm from cr28/tr4 */
.macro get_ptl reg
mfctl %cr28,\reg
Expand Down Expand Up @@ -415,24 +433,20 @@
3:
.endm

/* Release page_table_lock without reloading lock address.
We use an ordered store to ensure all prior accesses are
performed prior to releasing the lock. */
.macro ptl_unlock0 spc,tmp,tmp2
/* Release page_table_lock if for user space. We use an ordered
store to ensure all prior accesses are performed prior to
releasing the lock. Note stw may not be executed, so we
provide one extra nop when CONFIG_TLB_PTLOCK is defined. */
.macro ptl_unlock spc,tmp,tmp2
#ifdef CONFIG_TLB_PTLOCK
98: ldi __ARCH_SPIN_LOCK_UNLOCKED_VAL, \tmp2
98: get_ptl \tmp
ldi __ARCH_SPIN_LOCK_UNLOCKED_VAL, \tmp2
or,COND(=) %r0,\spc,%r0
stw,ma \tmp2,0(\tmp)
99: ALTERNATIVE(98b, 99b, ALT_COND_NO_SMP, INSN_NOP)
#endif
.endm

/* Release page_table_lock. */
.macro ptl_unlock1 spc,tmp,tmp2
#ifdef CONFIG_TLB_PTLOCK
98: get_ptl \tmp
ptl_unlock0 \spc,\tmp,\tmp2
99: ALTERNATIVE(98b, 99b, ALT_COND_NO_SMP, INSN_NOP)
insert_nops NUM_PIPELINE_INSNS - 4
#else
insert_nops NUM_PIPELINE_INSNS - 1
#endif
.endm

Expand Down Expand Up @@ -1124,7 +1138,7 @@ dtlb_miss_20w:

idtlbt pte,prot

ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop

Expand All @@ -1133,6 +1147,7 @@ dtlb_check_alias_20w:

idtlbt pte,prot

insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop

Expand All @@ -1150,7 +1165,7 @@ nadtlb_miss_20w:

idtlbt pte,prot

ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop

Expand All @@ -1159,6 +1174,7 @@ nadtlb_check_alias_20w:

idtlbt pte,prot

insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop

Expand All @@ -1184,7 +1200,7 @@ dtlb_miss_11:

mtsp t1, %sr1 /* Restore sr1 */

ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop

Expand All @@ -1194,6 +1210,7 @@ dtlb_check_alias_11:
idtlba pte,(va)
idtlbp prot,(va)

insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop

Expand All @@ -1217,7 +1234,7 @@ nadtlb_miss_11:

mtsp t1, %sr1 /* Restore sr1 */

ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop

Expand All @@ -1227,6 +1244,7 @@ nadtlb_check_alias_11:
idtlba pte,(va)
idtlbp prot,(va)

insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop

Expand All @@ -1246,7 +1264,7 @@ dtlb_miss_20:

idtlbt pte,prot

ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop

Expand All @@ -1255,6 +1273,7 @@ dtlb_check_alias_20:

idtlbt pte,prot

insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop

Expand All @@ -1274,7 +1293,7 @@ nadtlb_miss_20:

idtlbt pte,prot

ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop

Expand All @@ -1283,6 +1302,7 @@ nadtlb_check_alias_20:

idtlbt pte,prot

insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop

Expand Down Expand Up @@ -1319,7 +1339,7 @@ itlb_miss_20w:

iitlbt pte,prot

ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop

Expand All @@ -1343,7 +1363,7 @@ naitlb_miss_20w:

iitlbt pte,prot

ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop

Expand All @@ -1352,6 +1372,7 @@ naitlb_check_alias_20w:

iitlbt pte,prot

insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop

Expand All @@ -1377,7 +1398,7 @@ itlb_miss_11:

mtsp t1, %sr1 /* Restore sr1 */

ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop

Expand All @@ -1401,7 +1422,7 @@ naitlb_miss_11:

mtsp t1, %sr1 /* Restore sr1 */

ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop

Expand All @@ -1411,6 +1432,7 @@ naitlb_check_alias_11:
iitlba pte,(%sr0, va)
iitlbp prot,(%sr0, va)

insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop

Expand All @@ -1431,7 +1453,7 @@ itlb_miss_20:

iitlbt pte,prot

ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop

Expand All @@ -1451,7 +1473,7 @@ naitlb_miss_20:

iitlbt pte,prot

ptl_unlock1 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop

Expand All @@ -1460,6 +1482,7 @@ naitlb_check_alias_20:

iitlbt pte,prot

insert_nops NUM_PIPELINE_INSNS - 1
rfir
nop

Expand All @@ -1481,7 +1504,7 @@ dbit_trap_20w:

idtlbt pte,prot

ptl_unlock0 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
#else
Expand All @@ -1507,7 +1530,7 @@ dbit_trap_11:

mtsp t1, %sr1 /* Restore sr1 */

ptl_unlock0 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop

Expand All @@ -1527,7 +1550,7 @@ dbit_trap_20:

idtlbt pte,prot

ptl_unlock0 spc,t0,t1
ptl_unlock spc,t0,t1
rfir
nop
#endif
Expand Down
14 changes: 7 additions & 7 deletions arch/parisc/kernel/firmware.c
Original file line number Diff line number Diff line change
Expand Up @@ -78,12 +78,12 @@ static unsigned long pdc_result[NUM_PDC_RESULT] __aligned(8);
static unsigned long pdc_result2[NUM_PDC_RESULT] __aligned(8);

#ifdef CONFIG_64BIT
#define WIDE_FIRMWARE 0x1
#define NARROW_FIRMWARE 0x2
#define WIDE_FIRMWARE PDC_MODEL_OS64
#define NARROW_FIRMWARE PDC_MODEL_OS32

/* Firmware needs to be initially set to narrow to determine the
/* Firmware needs to be initially set to narrow to determine the
* actual firmware width. */
int parisc_narrow_firmware __ro_after_init = 2;
int parisc_narrow_firmware __ro_after_init = NARROW_FIRMWARE;
#endif

/* On most currently-supported platforms, IODC I/O calls are 32-bit calls
Expand Down Expand Up @@ -166,10 +166,10 @@ void set_firmware_width_unlocked(void)
if (pdc_result[0] != NARROW_FIRMWARE)
parisc_narrow_firmware = 0;
}

/**
* set_firmware_width - Determine if the firmware is wide or narrow.
*
*
* This function must be called before any pdc_* function that uses the
* convert_to_wide function.
*/
Expand All @@ -178,7 +178,7 @@ void set_firmware_width(void)
unsigned long flags;

/* already initialized? */
if (parisc_narrow_firmware != 2)
if (parisc_narrow_firmware != NARROW_FIRMWARE)
return;

spin_lock_irqsave(&pdc_lock, flags);
Expand Down
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