drm/i915: Fix bit name in PP_STATUS register

According to the spec PP_SEQUENCE_STATE_ON_S1_1 is the correct name, so
just rename it.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190302011405.6405-1-lucas.demarchi@intel.com

drivers/gpu/drm/i915/i915_reg.h

@@ -4723,7 +4723,7 @@ enum {
 #define   PP_SEQUENCE_STATE_OFF_S0_2	(0x2 << 0)
 #define   PP_SEQUENCE_STATE_OFF_S0_3	(0x3 << 0)
 #define   PP_SEQUENCE_STATE_ON_IDLE	(0x8 << 0)
-#define   PP_SEQUENCE_STATE_ON_S1_0	(0x9 << 0)
+#define   PP_SEQUENCE_STATE_ON_S1_1	(0x9 << 0)
 #define   PP_SEQUENCE_STATE_ON_S1_2	(0xa << 0)
 #define   PP_SEQUENCE_STATE_ON_S1_3	(0xb << 0)
 #define   PP_SEQUENCE_STATE_RESET	(0xf << 0)