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net/mlx5: Introduce vhca state event notifier
vhca state events indicates change in the state of the vhca that may occur due to a SF allocation, deallocation or enabling/disabling the SF HCA. Introduce vhca state event handler which will be used by SF devlink port manager and SF hardware id allocator in subsequent patches to act on the event. This enables single entity to subscribe, query and rearm the event for a function. Signed-off-by: Parav Pandit <parav@nvidia.com> Reviewed-by: Vu Pham <vuhuong@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Parav Pandit
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Saeed Mahameed
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Jan 22, 2021
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82 changes: 82 additions & 0 deletions
82
drivers/net/ethernet/mellanox/mlx5/core/sf/mlx5_ifc_vhca_event.h
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,82 @@ | ||
| /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ | ||
| /* Copyright (c) 2020 Mellanox Technologies Ltd */ | ||
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| #ifndef __MLX5_IFC_VHCA_EVENT_H__ | ||
| #define __MLX5_IFC_VHCA_EVENT_H__ | ||
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| enum mlx5_ifc_vhca_state { | ||
| MLX5_VHCA_STATE_INVALID = 0x0, | ||
| MLX5_VHCA_STATE_ALLOCATED = 0x1, | ||
| MLX5_VHCA_STATE_ACTIVE = 0x2, | ||
| MLX5_VHCA_STATE_IN_USE = 0x3, | ||
| MLX5_VHCA_STATE_TEARDOWN_REQUEST = 0x4, | ||
| }; | ||
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| struct mlx5_ifc_vhca_state_context_bits { | ||
| u8 arm_change_event[0x1]; | ||
| u8 reserved_at_1[0xb]; | ||
| u8 vhca_state[0x4]; | ||
| u8 reserved_at_10[0x10]; | ||
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| u8 sw_function_id[0x20]; | ||
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| u8 reserved_at_40[0x80]; | ||
| }; | ||
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| struct mlx5_ifc_query_vhca_state_out_bits { | ||
| u8 status[0x8]; | ||
| u8 reserved_at_8[0x18]; | ||
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| u8 syndrome[0x20]; | ||
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| u8 reserved_at_40[0x40]; | ||
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| struct mlx5_ifc_vhca_state_context_bits vhca_state_context; | ||
| }; | ||
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| struct mlx5_ifc_query_vhca_state_in_bits { | ||
| u8 opcode[0x10]; | ||
| u8 uid[0x10]; | ||
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| u8 reserved_at_20[0x10]; | ||
| u8 op_mod[0x10]; | ||
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| u8 embedded_cpu_function[0x1]; | ||
| u8 reserved_at_41[0xf]; | ||
| u8 function_id[0x10]; | ||
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| u8 reserved_at_60[0x20]; | ||
| }; | ||
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| struct mlx5_ifc_vhca_state_field_select_bits { | ||
| u8 reserved_at_0[0x1e]; | ||
| u8 sw_function_id[0x1]; | ||
| u8 arm_change_event[0x1]; | ||
| }; | ||
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| struct mlx5_ifc_modify_vhca_state_out_bits { | ||
| u8 status[0x8]; | ||
| u8 reserved_at_8[0x18]; | ||
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| u8 syndrome[0x20]; | ||
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| u8 reserved_at_40[0x40]; | ||
| }; | ||
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| struct mlx5_ifc_modify_vhca_state_in_bits { | ||
| u8 opcode[0x10]; | ||
| u8 uid[0x10]; | ||
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| u8 reserved_at_20[0x10]; | ||
| u8 op_mod[0x10]; | ||
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| u8 embedded_cpu_function[0x1]; | ||
| u8 reserved_at_41[0xf]; | ||
| u8 function_id[0x10]; | ||
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| struct mlx5_ifc_vhca_state_field_select_bits vhca_state_field_select; | ||
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| struct mlx5_ifc_vhca_state_context_bits vhca_state_context; | ||
| }; | ||
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| #endif |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,45 @@ | ||
| /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ | ||
| /* Copyright (c) 2020 Mellanox Technologies Ltd */ | ||
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| #ifndef __MLX5_SF_H__ | ||
| #define __MLX5_SF_H__ | ||
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| #include <linux/mlx5/driver.h> | ||
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| static inline u16 mlx5_sf_start_function_id(const struct mlx5_core_dev *dev) | ||
| { | ||
| return MLX5_CAP_GEN(dev, sf_base_id); | ||
| } | ||
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| #ifdef CONFIG_MLX5_SF | ||
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| static inline bool mlx5_sf_supported(const struct mlx5_core_dev *dev) | ||
| { | ||
| return MLX5_CAP_GEN(dev, sf); | ||
| } | ||
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| static inline u16 mlx5_sf_max_functions(const struct mlx5_core_dev *dev) | ||
| { | ||
| if (!mlx5_sf_supported(dev)) | ||
| return 0; | ||
| if (MLX5_CAP_GEN(dev, max_num_sf)) | ||
| return MLX5_CAP_GEN(dev, max_num_sf); | ||
| else | ||
| return 1 << MLX5_CAP_GEN(dev, log_max_sf); | ||
| } | ||
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| #else | ||
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| static inline bool mlx5_sf_supported(const struct mlx5_core_dev *dev) | ||
| { | ||
| return false; | ||
| } | ||
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| static inline u16 mlx5_sf_max_functions(const struct mlx5_core_dev *dev) | ||
| { | ||
| return 0; | ||
| } | ||
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| #endif | ||
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| #endif |
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