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gpio: add driver for MEN 16Z127 GPIO controller
The 16Z127 is a 32bit GPIO controller on a MCB FPGA. Every single line can be configured as input and output. Push pull and open drain are supported as well as setting a debounce value for the input lines. Signed-off-by: Andreas Werner <andy@wernerandy.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mar 9, 2016
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/* | ||
* MEN 16Z127 GPIO driver | ||
* | ||
* Copyright (C) 2016 MEN Mikroelektronik GmbH (www.men.de) | ||
* | ||
* This program is free software; you can redistribute it and/or modify it | ||
* under the terms of the GNU General Public License as published by the Free | ||
* Software Foundation; version 2 of the License. | ||
*/ | ||
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#include <linux/kernel.h> | ||
#include <linux/module.h> | ||
#include <linux/io.h> | ||
#include <linux/err.h> | ||
#include <linux/mcb.h> | ||
#include <linux/bitops.h> | ||
#include <linux/gpio/driver.h> | ||
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#define MEN_Z127_CTRL 0x00 | ||
#define MEN_Z127_PSR 0x04 | ||
#define MEN_Z127_IRQR 0x08 | ||
#define MEN_Z127_GPIODR 0x0c | ||
#define MEN_Z127_IER1 0x10 | ||
#define MEN_Z127_IER2 0x14 | ||
#define MEN_Z127_DBER 0x18 | ||
#define MEN_Z127_ODER 0x1C | ||
#define GPIO_TO_DBCNT_REG(gpio) ((gpio * 4) + 0x80) | ||
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#define MEN_Z127_DB_MIN_US 50 | ||
/* 16 bit compare register. Each bit represents 50us */ | ||
#define MEN_Z127_DB_MAX_US (0xffff * MEN_Z127_DB_MIN_US) | ||
#define MEN_Z127_DB_IN_RANGE(db) ((db >= MEN_Z127_DB_MIN_US) && \ | ||
(db <= MEN_Z127_DB_MAX_US)) | ||
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struct men_z127_gpio { | ||
struct gpio_chip gc; | ||
void __iomem *reg_base; | ||
struct mcb_device *mdev; | ||
struct resource *mem; | ||
spinlock_t lock; | ||
}; | ||
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static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio, | ||
unsigned debounce) | ||
{ | ||
struct men_z127_gpio *priv = gpiochip_get_data(gc); | ||
struct device *dev = &priv->mdev->dev; | ||
unsigned int rnd; | ||
u32 db_en, db_cnt; | ||
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if (!MEN_Z127_DB_IN_RANGE(debounce)) { | ||
dev_err(dev, "debounce value %u out of range", debounce); | ||
return -EINVAL; | ||
} | ||
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if (debounce > 0) { | ||
/* round up or down depending on MSB-1 */ | ||
rnd = fls(debounce) - 1; | ||
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if (rnd && (debounce & BIT(rnd - 1))) | ||
debounce = round_up(debounce, MEN_Z127_DB_MIN_US); | ||
else | ||
debounce = round_down(debounce, MEN_Z127_DB_MIN_US); | ||
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if (debounce > MEN_Z127_DB_MAX_US) | ||
debounce = MEN_Z127_DB_MAX_US; | ||
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/* 50us per register unit */ | ||
debounce /= 50; | ||
} | ||
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spin_lock(&priv->lock); | ||
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db_en = readl(priv->reg_base + MEN_Z127_DBER); | ||
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if (debounce == 0) { | ||
db_en &= ~BIT(gpio); | ||
db_cnt = 0; | ||
} else { | ||
db_en |= BIT(gpio); | ||
db_cnt = debounce; | ||
} | ||
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writel(db_en, priv->reg_base + MEN_Z127_DBER); | ||
writel(db_cnt, priv->reg_base + GPIO_TO_DBCNT_REG(gpio)); | ||
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spin_unlock(&priv->lock); | ||
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return 0; | ||
} | ||
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static int men_z127_request(struct gpio_chip *gc, unsigned gpio_pin) | ||
{ | ||
struct men_z127_gpio *priv = gpiochip_get_data(gc); | ||
u32 od_en; | ||
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if (gpio_pin >= gc->ngpio) | ||
return -EINVAL; | ||
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spin_lock(&priv->lock); | ||
od_en = readl(priv->reg_base + MEN_Z127_ODER); | ||
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if (gpiochip_line_is_open_drain(gc, gpio_pin)) | ||
od_en |= BIT(gpio_pin); | ||
else | ||
od_en &= ~BIT(gpio_pin); | ||
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writel(od_en, priv->reg_base + MEN_Z127_ODER); | ||
spin_unlock(&priv->lock); | ||
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return 0; | ||
} | ||
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static int men_z127_probe(struct mcb_device *mdev, | ||
const struct mcb_device_id *id) | ||
{ | ||
struct men_z127_gpio *men_z127_gpio; | ||
struct device *dev = &mdev->dev; | ||
int ret; | ||
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men_z127_gpio = devm_kzalloc(dev, sizeof(struct men_z127_gpio), | ||
GFP_KERNEL); | ||
if (!men_z127_gpio) | ||
return -ENOMEM; | ||
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men_z127_gpio->mem = mcb_request_mem(mdev, dev_name(dev)); | ||
if (IS_ERR(men_z127_gpio->mem)) { | ||
dev_err(dev, "failed to request device memory"); | ||
return PTR_ERR(men_z127_gpio->mem); | ||
} | ||
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men_z127_gpio->reg_base = ioremap(men_z127_gpio->mem->start, | ||
resource_size(men_z127_gpio->mem)); | ||
if (men_z127_gpio->reg_base == NULL) { | ||
ret = -ENXIO; | ||
goto err_release; | ||
} | ||
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men_z127_gpio->mdev = mdev; | ||
mcb_set_drvdata(mdev, men_z127_gpio); | ||
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ret = bgpio_init(&men_z127_gpio->gc, &mdev->dev, 4, | ||
men_z127_gpio->reg_base + MEN_Z127_PSR, | ||
men_z127_gpio->reg_base + MEN_Z127_CTRL, | ||
NULL, | ||
men_z127_gpio->reg_base + MEN_Z127_GPIODR, | ||
NULL, 0); | ||
if (ret) | ||
goto err_unmap; | ||
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men_z127_gpio->gc.set_debounce = men_z127_debounce; | ||
men_z127_gpio->gc.request = men_z127_request; | ||
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ret = gpiochip_add_data(&men_z127_gpio->gc, men_z127_gpio); | ||
if (ret) { | ||
dev_err(dev, "failed to register MEN 16Z127 GPIO controller"); | ||
goto err_unmap; | ||
} | ||
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dev_info(dev, "MEN 16Z127 GPIO driver registered"); | ||
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return 0; | ||
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err_unmap: | ||
iounmap(men_z127_gpio->reg_base); | ||
err_release: | ||
mcb_release_mem(men_z127_gpio->mem); | ||
return ret; | ||
} | ||
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static void men_z127_remove(struct mcb_device *mdev) | ||
{ | ||
struct men_z127_gpio *men_z127_gpio = mcb_get_drvdata(mdev); | ||
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gpiochip_remove(&men_z127_gpio->gc); | ||
iounmap(men_z127_gpio->reg_base); | ||
mcb_release_mem(men_z127_gpio->mem); | ||
} | ||
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static const struct mcb_device_id men_z127_ids[] = { | ||
{ .device = 0x7f }, | ||
{ } | ||
}; | ||
MODULE_DEVICE_TABLE(mcb, men_z127_ids); | ||
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static struct mcb_driver men_z127_driver = { | ||
.driver = { | ||
.name = "z127-gpio", | ||
.owner = THIS_MODULE, | ||
}, | ||
.probe = men_z127_probe, | ||
.remove = men_z127_remove, | ||
.id_table = men_z127_ids, | ||
}; | ||
module_mcb_driver(men_z127_driver); | ||
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MODULE_AUTHOR("Andreas Werner <andreas.werner@men.de>"); | ||
MODULE_DESCRIPTION("MEN 16z127 GPIO Controller"); | ||
MODULE_LICENSE("GPL v2"); | ||
MODULE_ALIAS("mcb:16z127"); |