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Documentation: DT: Add binding documentation for NVIDIA ADMA
Add device-tree binding documentation for the Tegra210 Audio DMA controller. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt
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* NVIDIA Tegra Audio DMA (ADMA) controller | ||
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The Tegra Audio DMA controller that is used for transferring data | ||
between system memory and the Audio Processing Engine (APE). | ||
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Required properties: | ||
- compatible: Must be "nvidia,tegra210-adma". | ||
- reg: Should contain DMA registers location and length. This should be | ||
a single entry that includes all of the per-channel registers in one | ||
contiguous bank. | ||
- interrupt-parent: Phandle to the interrupt parent controller. | ||
- interrupts: Should contain all of the per-channel DMA interrupts in | ||
ascending order with respect to the DMA channel index. | ||
- clocks: Must contain one entry for the ADMA module clock | ||
(TEGRA210_CLK_D_AUDIO). | ||
- clock-names: Must contain the name "d_audio" for the corresponding | ||
'clocks' entry. | ||
- #dma-cells : Must be 1. The first cell denotes the receive/transmit | ||
request number and should be between 1 and the maximum number of | ||
requests supported. This value corresponds to the RX/TX_REQUEST_SELECT | ||
fields in the ADMA_CHn_CTRL register. | ||
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Example: | ||
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adma: dma@702e2000 { | ||
compatible = "nvidia,tegra210-adma"; | ||
reg = <0x0 0x702e2000 0x0 0x2000>; | ||
interrupt-parent = <&tegra_agic>; | ||
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; | ||
clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; | ||
clock-names = "d_audio"; | ||
#dma-cells = <1>; | ||
}; |