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Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/l…
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…inux/kernel/git/tip/tip

Pull x86 updates and fixes from Thomas Gleixner:

 - Fix the (late) fallout from the vector management rework causing
   hlist corruption and irq descriptor reference leaks caused by a
   missing sanity check.

   The straight forward fix triggered another long standing issue to
   surface. The pre rework code hid the issue due to being way slower,
   but now the chance that user space sees an EBUSY error return when
   updating irq affinities is way higher, though quite a bunch of
   userspace tools do not handle it properly despite the fact that EBUSY
   could be returned for at least 10 years.

   It turned out that the EBUSY return can be avoided completely by
   utilizing the existing delayed affinity update mechanism for irq
   remapped scenarios as well. That's a bit more error handling in the
   kernel, but avoids fruitless fingerpointing discussions with tool
   developers.

 - Decouple PHYSICAL_MASK from AMD SME as its going to be required for
   the upcoming Intel memory encryption support as well.

 - Handle legacy device ACPI detection properly for newer platforms

 - Fix the wrong argument ordering in the vector allocation tracepoint

 - Simplify the IDT setup code for the APIC=n case

 - Use the proper string helpers in the MTRR code

 - Remove a stale unused VDSO source file

 - Convert the microcode update lock to a raw spinlock as its used in
   atomic context.

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/intel_rdt: Enable CMT and MBM on new Skylake stepping
  x86/apic/vector: Print APIC control bits in debugfs
  genirq/affinity: Defer affinity setting if irq chip is busy
  x86/platform/uv: Use apic_ack_irq()
  x86/ioapic: Use apic_ack_irq()
  irq_remapping: Use apic_ack_irq()
  x86/apic: Provide apic_ack_irq()
  genirq/migration: Avoid out of line call if pending is not set
  genirq/generic_pending: Do not lose pending affinity update
  x86/apic/vector: Prevent hlist corruption and leaks
  x86/vector: Fix the args of vector_alloc tracepoint
  x86/idt: Simplify the idt_setup_apic_and_irq_gates()
  x86/platform/uv: Remove extra parentheses
  x86/mm: Decouple dynamic __PHYSICAL_MASK from AMD SME
  x86: Mark native_set_p4d() as __always_inline
  x86/microcode: Make the late update update_lock a raw lock for RT
  x86/mtrr: Convert to use strncpy_from_user() helper
  x86/mtrr: Convert to use match_string() helper
  x86/vdso: Remove unused file
  x86/i8237: Register device based on FADT legacy boot flag
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Linus Torvalds committed Jun 10, 2018
2 parents a2211de + 1d9f3e2 commit f4e5b30
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Showing 26 changed files with 176 additions and 80 deletions.
4 changes: 4 additions & 0 deletions arch/x86/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -334,6 +334,9 @@ config ARCH_SUPPORTS_UPROBES
config FIX_EARLYCON_MEM
def_bool y

config DYNAMIC_PHYSICAL_MASK
bool

config PGTABLE_LEVELS
int
default 5 if X86_5LEVEL
Expand Down Expand Up @@ -1486,6 +1489,7 @@ config ARCH_HAS_MEM_ENCRYPT
config AMD_MEM_ENCRYPT
bool "AMD Secure Memory Encryption (SME) support"
depends on X86_64 && CPU_SUP_AMD
select DYNAMIC_PHYSICAL_MASK
---help---
Say yes to enable support for the encryption of system memory.
This requires an AMD processor that supports Secure Memory
Expand Down
5 changes: 5 additions & 0 deletions arch/x86/boot/compressed/kaslr_64.c
Original file line number Diff line number Diff line change
Expand Up @@ -69,6 +69,8 @@ static struct alloc_pgt_data pgt_data;
/* The top level page table entry pointer. */
static unsigned long top_level_pgt;

phys_addr_t physical_mask = (1ULL << __PHYSICAL_MASK_SHIFT) - 1;

/*
* Mapping information structure passed to kernel_ident_mapping_init().
* Due to relocation, pointers must be assigned at run time not build time.
Expand All @@ -81,6 +83,9 @@ void initialize_identity_maps(void)
/* If running as an SEV guest, the encryption mask is required. */
set_sev_encryption_mask();

/* Exclude the encryption mask from __PHYSICAL_MASK */
physical_mask &= ~sme_me_mask;

/* Init mapping_info with run-time function/buffer pointers. */
mapping_info.alloc_pgt_page = alloc_pgt_page;
mapping_info.context = &pgt_data;
Expand Down
2 changes: 2 additions & 0 deletions arch/x86/include/asm/apic.h
Original file line number Diff line number Diff line change
Expand Up @@ -436,6 +436,8 @@ static inline void apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) {}

#endif /* CONFIG_X86_LOCAL_APIC */

extern void apic_ack_irq(struct irq_data *data);

static inline void ack_APIC_irq(void)
{
/*
Expand Down
8 changes: 7 additions & 1 deletion arch/x86/include/asm/page_types.h
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,6 @@
#define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT)
#define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1))

#define __PHYSICAL_MASK ((phys_addr_t)(__sme_clr((1ULL << __PHYSICAL_MASK_SHIFT) - 1)))
#define __VIRTUAL_MASK ((1UL << __VIRTUAL_MASK_SHIFT) - 1)

/* Cast *PAGE_MASK to a signed type so that it is sign-extended if
Expand Down Expand Up @@ -55,6 +54,13 @@

#ifndef __ASSEMBLY__

#ifdef CONFIG_DYNAMIC_PHYSICAL_MASK
extern phys_addr_t physical_mask;
#define __PHYSICAL_MASK physical_mask
#else
#define __PHYSICAL_MASK ((phys_addr_t)((1ULL << __PHYSICAL_MASK_SHIFT) - 1))
#endif

extern int devmem_is_allowed(unsigned long pagenr);

extern unsigned long max_low_pfn_mapped;
Expand Down
4 changes: 2 additions & 2 deletions arch/x86/include/asm/pgtable_64.h
Original file line number Diff line number Diff line change
Expand Up @@ -216,7 +216,7 @@ static inline pgd_t pti_set_user_pgd(pgd_t *pgdp, pgd_t pgd)
}
#endif

static inline void native_set_p4d(p4d_t *p4dp, p4d_t p4d)
static __always_inline void native_set_p4d(p4d_t *p4dp, p4d_t p4d)
{
pgd_t pgd;

Expand All @@ -230,7 +230,7 @@ static inline void native_set_p4d(p4d_t *p4dp, p4d_t p4d)
*p4dp = native_make_p4d(native_pgd_val(pgd));
}

static inline void native_p4d_clear(p4d_t *p4d)
static __always_inline void native_p4d_clear(p4d_t *p4d)
{
native_set_p4d(p4d, native_make_p4d(0));
}
Expand Down
2 changes: 1 addition & 1 deletion arch/x86/include/asm/trace/irq_vectors.h
Original file line number Diff line number Diff line change
Expand Up @@ -236,7 +236,7 @@ TRACE_EVENT(vector_alloc,
TP_PROTO(unsigned int irq, unsigned int vector, bool reserved,
int ret),

TP_ARGS(irq, vector, ret, reserved),
TP_ARGS(irq, vector, reserved, ret),

TP_STRUCT__entry(
__field( unsigned int, irq )
Expand Down
1 change: 1 addition & 0 deletions arch/x86/include/asm/x86_init.h
Original file line number Diff line number Diff line change
Expand Up @@ -301,5 +301,6 @@ extern struct x86_apic_ops x86_apic_ops;
extern void x86_early_init_platform_quirks(void);
extern void x86_init_noop(void);
extern void x86_init_uint_noop(unsigned int unused);
extern bool x86_pnpbios_disabled(void);

#endif
2 changes: 1 addition & 1 deletion arch/x86/kernel/apic/io_apic.c
Original file line number Diff line number Diff line change
Expand Up @@ -1851,7 +1851,7 @@ static void ioapic_ir_ack_level(struct irq_data *irq_data)
* intr-remapping table entry. Hence for the io-apic
* EOI we use the pin number.
*/
ack_APIC_irq();
apic_ack_irq(irq_data);
eoi_ioapic_pin(data->entry.vector, data);
}

Expand Down
45 changes: 30 additions & 15 deletions arch/x86/kernel/apic/vector.c
Original file line number Diff line number Diff line change
Expand Up @@ -235,6 +235,15 @@ static int allocate_vector(struct irq_data *irqd, const struct cpumask *dest)
if (vector && cpu_online(cpu) && cpumask_test_cpu(cpu, dest))
return 0;

/*
* Careful here. @apicd might either have move_in_progress set or
* be enqueued for cleanup. Assigning a new vector would either
* leave a stale vector on some CPU around or in case of a pending
* cleanup corrupt the hlist.
*/
if (apicd->move_in_progress || !hlist_unhashed(&apicd->clist))
return -EBUSY;

vector = irq_matrix_alloc(vector_matrix, dest, resvd, &cpu);
if (vector > 0)
apic_update_vector(irqd, vector, cpu);
Expand Down Expand Up @@ -579,8 +588,7 @@ static int x86_vector_alloc_irqs(struct irq_domain *domain, unsigned int virq,
static void x86_vector_debug_show(struct seq_file *m, struct irq_domain *d,
struct irq_data *irqd, int ind)
{
unsigned int cpu, vector, prev_cpu, prev_vector;
struct apic_chip_data *apicd;
struct apic_chip_data apicd;
unsigned long flags;
int irq;

Expand All @@ -596,24 +604,26 @@ static void x86_vector_debug_show(struct seq_file *m, struct irq_domain *d,
return;
}

apicd = irqd->chip_data;
if (!apicd) {
if (!irqd->chip_data) {
seq_printf(m, "%*sVector: Not assigned\n", ind, "");
return;
}

raw_spin_lock_irqsave(&vector_lock, flags);
cpu = apicd->cpu;
vector = apicd->vector;
prev_cpu = apicd->prev_cpu;
prev_vector = apicd->prev_vector;
memcpy(&apicd, irqd->chip_data, sizeof(apicd));
raw_spin_unlock_irqrestore(&vector_lock, flags);
seq_printf(m, "%*sVector: %5u\n", ind, "", vector);
seq_printf(m, "%*sTarget: %5u\n", ind, "", cpu);
if (prev_vector) {
seq_printf(m, "%*sPrevious vector: %5u\n", ind, "", prev_vector);
seq_printf(m, "%*sPrevious target: %5u\n", ind, "", prev_cpu);

seq_printf(m, "%*sVector: %5u\n", ind, "", apicd.vector);
seq_printf(m, "%*sTarget: %5u\n", ind, "", apicd.cpu);
if (apicd.prev_vector) {
seq_printf(m, "%*sPrevious vector: %5u\n", ind, "", apicd.prev_vector);
seq_printf(m, "%*sPrevious target: %5u\n", ind, "", apicd.prev_cpu);
}
seq_printf(m, "%*smove_in_progress: %u\n", ind, "", apicd.move_in_progress ? 1 : 0);
seq_printf(m, "%*sis_managed: %u\n", ind, "", apicd.is_managed ? 1 : 0);
seq_printf(m, "%*scan_reserve: %u\n", ind, "", apicd.can_reserve ? 1 : 0);
seq_printf(m, "%*shas_reserved: %u\n", ind, "", apicd.has_reserved ? 1 : 0);
seq_printf(m, "%*scleanup_pending: %u\n", ind, "", !hlist_unhashed(&apicd.clist));
}
#endif

Expand Down Expand Up @@ -800,13 +810,18 @@ static int apic_retrigger_irq(struct irq_data *irqd)
return 1;
}

void apic_ack_edge(struct irq_data *irqd)
void apic_ack_irq(struct irq_data *irqd)
{
irq_complete_move(irqd_cfg(irqd));
irq_move_irq(irqd);
ack_APIC_irq();
}

void apic_ack_edge(struct irq_data *irqd)
{
irq_complete_move(irqd_cfg(irqd));
apic_ack_irq(irqd);
}

static struct irq_chip lapic_controller = {
.name = "APIC",
.irq_ack = apic_ack_edge,
Expand Down
2 changes: 2 additions & 0 deletions arch/x86/kernel/cpu/intel_rdt.c
Original file line number Diff line number Diff line change
Expand Up @@ -845,6 +845,8 @@ static __init void rdt_quirks(void)
case INTEL_FAM6_SKYLAKE_X:
if (boot_cpu_data.x86_stepping <= 4)
set_rdt_options("!cmt,!mbmtotal,!mbmlocal,!l3cat");
else
set_rdt_options("!l3cat");
}
}

Expand Down
6 changes: 3 additions & 3 deletions arch/x86/kernel/cpu/microcode/core.c
Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,7 @@ static DEFINE_MUTEX(microcode_mutex);
/*
* Serialize late loading so that CPUs get updated one-by-one.
*/
static DEFINE_SPINLOCK(update_lock);
static DEFINE_RAW_SPINLOCK(update_lock);

struct ucode_cpu_info ucode_cpu_info[NR_CPUS];

Expand Down Expand Up @@ -560,9 +560,9 @@ static int __reload_late(void *info)
if (__wait_for_cpus(&late_cpus_in, NSEC_PER_SEC))
return -1;

spin_lock(&update_lock);
raw_spin_lock(&update_lock);
apply_microcode_local(&err);
spin_unlock(&update_lock);
raw_spin_unlock(&update_lock);

/* siblings return UCODE_OK because their engine got updated already */
if (err > UCODE_NFOUND) {
Expand Down
33 changes: 12 additions & 21 deletions arch/x86/kernel/cpu/mtrr/if.c
Original file line number Diff line number Diff line change
Expand Up @@ -106,17 +106,9 @@ mtrr_write(struct file *file, const char __user *buf, size_t len, loff_t * ppos)

memset(line, 0, LINE_SIZE);

length = len;
length--;

if (length > LINE_SIZE - 1)
length = LINE_SIZE - 1;

length = strncpy_from_user(line, buf, LINE_SIZE - 1);
if (length < 0)
return -EINVAL;

if (copy_from_user(line, buf, length))
return -EFAULT;
return length;

linelen = strlen(line);
ptr = line + linelen - 1;
Expand Down Expand Up @@ -149,17 +141,16 @@ mtrr_write(struct file *file, const char __user *buf, size_t len, loff_t * ppos)
return -EINVAL;
ptr = skip_spaces(ptr + 5);

for (i = 0; i < MTRR_NUM_TYPES; ++i) {
if (strcmp(ptr, mtrr_strings[i]))
continue;
base >>= PAGE_SHIFT;
size >>= PAGE_SHIFT;
err = mtrr_add_page((unsigned long)base, (unsigned long)size, i, true);
if (err < 0)
return err;
return len;
}
return -EINVAL;
i = match_string(mtrr_strings, MTRR_NUM_TYPES, ptr);
if (i < 0)
return i;

base >>= PAGE_SHIFT;
size >>= PAGE_SHIFT;
err = mtrr_add_page((unsigned long)base, (unsigned long)size, i, true);
if (err < 0)
return err;
return len;
}

static long
Expand Down
25 changes: 25 additions & 0 deletions arch/x86/kernel/i8237.c
Original file line number Diff line number Diff line change
Expand Up @@ -9,10 +9,12 @@
* your option) any later version.
*/

#include <linux/dmi.h>
#include <linux/init.h>
#include <linux/syscore_ops.h>

#include <asm/dma.h>
#include <asm/x86_init.h>

/*
* This module just handles suspend/resume issues with the
Expand Down Expand Up @@ -49,6 +51,29 @@ static struct syscore_ops i8237_syscore_ops = {

static int __init i8237A_init_ops(void)
{
/*
* From SKL PCH onwards, the legacy DMA device is removed in which the
* I/O ports (81h-83h, 87h, 89h-8Bh, 8Fh) related to it are removed
* as well. All removed ports must return 0xff for a inb() request.
*
* Note: DMA_PAGE_2 (port 0x81) should not be checked for detecting
* the presence of DMA device since it may be used by BIOS to decode
* LPC traffic for POST codes. Original LPC only decodes one byte of
* port 0x80 but some BIOS may choose to enhance PCH LPC port 0x8x
* decoding.
*/
if (dma_inb(DMA_PAGE_0) == 0xFF)
return -ENODEV;

/*
* It is not required to load this driver as newer SoC may not
* support 8237 DMA or bus mastering from LPC. Platform firmware
* must announce the support for such legacy devices via
* ACPI_FADT_LEGACY_DEVICES field in FADT table.
*/
if (x86_pnpbios_disabled() && dmi_get_bios_year() >= 2017)
return -ENODEV;

register_syscore_ops(&i8237_syscore_ops);
return 0;
}
Expand Down
7 changes: 2 additions & 5 deletions arch/x86/kernel/idt.c
Original file line number Diff line number Diff line change
Expand Up @@ -317,15 +317,12 @@ void __init idt_setup_apic_and_irq_gates(void)
set_intr_gate(i, entry);
}

for_each_clear_bit_from(i, system_vectors, NR_VECTORS) {
#ifdef CONFIG_X86_LOCAL_APIC
for_each_clear_bit_from(i, system_vectors, NR_VECTORS) {
set_bit(i, system_vectors);
set_intr_gate(i, spurious_interrupt);
#else
entry = irq_entries_start + 8 * (i - FIRST_EXTERNAL_VECTOR);
set_intr_gate(i, entry);
#endif
}
#endif
}

/**
Expand Down
7 changes: 6 additions & 1 deletion arch/x86/kernel/platform-quirks.c
Original file line number Diff line number Diff line change
Expand Up @@ -33,9 +33,14 @@ void __init x86_early_init_platform_quirks(void)
x86_platform.set_legacy_features();
}

bool __init x86_pnpbios_disabled(void)
{
return x86_platform.legacy.devices.pnpbios == 0;
}

#if defined(CONFIG_PNPBIOS)
bool __init arch_pnpbios_disabled(void)
{
return x86_platform.legacy.devices.pnpbios == 0;
return x86_pnpbios_disabled();
}
#endif
3 changes: 3 additions & 0 deletions arch/x86/mm/mem_encrypt_identity.c
Original file line number Diff line number Diff line change
Expand Up @@ -527,6 +527,7 @@ void __init sme_enable(struct boot_params *bp)
/* SEV state cannot be controlled by a command line option */
sme_me_mask = me_mask;
sev_enabled = true;
physical_mask &= ~sme_me_mask;
return;
}

Expand Down Expand Up @@ -561,4 +562,6 @@ void __init sme_enable(struct boot_params *bp)
sme_me_mask = 0;
else
sme_me_mask = active_by_default ? me_mask : 0;

physical_mask &= ~sme_me_mask;
}
5 changes: 5 additions & 0 deletions arch/x86/mm/pgtable.c
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,11 @@
#include <asm/fixmap.h>
#include <asm/mtrr.h>

#ifdef CONFIG_DYNAMIC_PHYSICAL_MASK
phys_addr_t physical_mask __ro_after_init = (1ULL << __PHYSICAL_MASK_SHIFT) - 1;
EXPORT_SYMBOL(physical_mask);
#endif

#define PGALLOC_GFP (GFP_KERNEL_ACCOUNT | __GFP_ZERO)

#ifdef CONFIG_HIGHPTE
Expand Down
2 changes: 1 addition & 1 deletion arch/x86/platform/uv/tlb_uv.c
Original file line number Diff line number Diff line change
Expand Up @@ -615,7 +615,7 @@ static int uv2_3_wait_completion(struct bau_desc *bau_desc,

/* spin on the status MMR, waiting for it to go idle */
while (descriptor_stat != UV2H_DESC_IDLE) {
if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT)) {
if (descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT) {
/*
* A h/w bug on the destination side may
* have prevented the message being marked
Expand Down
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