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drm/xe/vf: Catch all unexpected register reads
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While we can only mimic read32 for a few GT registers for which
the PF shared the values, we shouldn't avoid calling helper code
if we try to access non-GT register, as then we miss to trigger
a debug warning. For cases where sriov_vf_gt was not set, just
use primary_gt instead.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250311135726.1998-3-michal.wajdeczko@intel.com
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Michal Wajdeczko committed Mar 12, 2025
1 parent d3414ac commit f990c11
Showing 1 changed file with 6 additions and 4 deletions.
10 changes: 6 additions & 4 deletions drivers/gpu/drm/xe/xe_mmio.c
Original file line number Diff line number Diff line change
Expand Up @@ -204,8 +204,9 @@ void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val)

trace_xe_reg_rw(mmio, true, addr, val, sizeof(val));

if (!reg.vf && mmio->sriov_vf_gt)
xe_gt_sriov_vf_write32(mmio->sriov_vf_gt, reg, val);
if (!reg.vf && IS_SRIOV_VF(mmio->tile->xe))
xe_gt_sriov_vf_write32(mmio->sriov_vf_gt ?:
mmio->tile->primary_gt, reg, val);
else
writel(val, mmio->regs + addr);
}
Expand All @@ -218,8 +219,9 @@ u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg)
/* Wa_15015404425 */
mmio_flush_pending_writes(mmio);

if (!reg.vf && mmio->sriov_vf_gt)
val = xe_gt_sriov_vf_read32(mmio->sriov_vf_gt, reg);
if (!reg.vf && IS_SRIOV_VF(mmio->tile->xe))
val = xe_gt_sriov_vf_read32(mmio->sriov_vf_gt ?:
mmio->tile->primary_gt, reg);
else
val = readl(mmio->regs + addr);

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