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iio: adc: rockchip_saradc: Add callback functions
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Add start, read and power_down callback functions,
which will help in adding new rockchip device support
cleanly.

Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Shreeya Patel <shreeya.patel@collabora.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230603185340.13838-2-shreeya.patel@collabora.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Simon Xue authored and Jonathan Cameron committed Jun 4, 2023
1 parent 12a8750 commit fb1c13d
Showing 1 changed file with 52 additions and 12 deletions.
64 changes: 52 additions & 12 deletions drivers/iio/adc/rockchip_saradc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -38,10 +38,15 @@
#define SARADC_TIMEOUT msecs_to_jiffies(100)
#define SARADC_MAX_CHANNELS 8

struct rockchip_saradc;

struct rockchip_saradc_data {
const struct iio_chan_spec *channels;
int num_channels;
unsigned long clk_rate;
void (*start)(struct rockchip_saradc *info, int chn);
int (*read)(struct rockchip_saradc *info);
void (*power_down)(struct rockchip_saradc *info);
};

struct rockchip_saradc {
Expand All @@ -60,27 +65,50 @@ struct rockchip_saradc {
struct notifier_block nb;
};

static void rockchip_saradc_power_down(struct rockchip_saradc *info)
static void rockchip_saradc_reset_controller(struct reset_control *reset);

static void rockchip_saradc_start_v1(struct rockchip_saradc *info, int chn)
{
/* 8 clock periods as delay between power up and start cmd */
writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC);
/* Select the channel to be used and trigger conversion */
writel(SARADC_CTRL_POWER_CTRL | (chn & SARADC_CTRL_CHN_MASK) |
SARADC_CTRL_IRQ_ENABLE, info->regs + SARADC_CTRL);
}

static void rockchip_saradc_start(struct rockchip_saradc *info, int chn)
{
info->data->start(info, chn);
}

static int rockchip_saradc_read_v1(struct rockchip_saradc *info)
{
return readl_relaxed(info->regs + SARADC_DATA);
}

static int rockchip_saradc_read(struct rockchip_saradc *info)
{
return info->data->read(info);
}

static void rockchip_saradc_power_down_v1(struct rockchip_saradc *info)
{
/* Clear irq & power down adc */
writel_relaxed(0, info->regs + SARADC_CTRL);
}

static void rockchip_saradc_power_down(struct rockchip_saradc *info)
{
if (info->data->power_down)
info->data->power_down(info);
}

static int rockchip_saradc_conversion(struct rockchip_saradc *info,
struct iio_chan_spec const *chan)
{
reinit_completion(&info->completion);

/* 8 clock periods as delay between power up and start cmd */
writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC);

info->last_chan = chan;

/* Select the channel to be used and trigger conversion */
writel(SARADC_CTRL_POWER_CTRL
| (chan->channel & SARADC_CTRL_CHN_MASK)
| SARADC_CTRL_IRQ_ENABLE,
info->regs + SARADC_CTRL);
rockchip_saradc_start(info, chan->channel);

if (!wait_for_completion_timeout(&info->completion, SARADC_TIMEOUT))
return -ETIMEDOUT;
Expand Down Expand Up @@ -123,7 +151,7 @@ static irqreturn_t rockchip_saradc_isr(int irq, void *dev_id)
struct rockchip_saradc *info = dev_id;

/* Read value */
info->last_val = readl_relaxed(info->regs + SARADC_DATA);
info->last_val = rockchip_saradc_read(info);
info->last_val &= GENMASK(info->last_chan->scan_type.realbits - 1, 0);

rockchip_saradc_power_down(info);
Expand Down Expand Up @@ -163,6 +191,9 @@ static const struct rockchip_saradc_data saradc_data = {
.channels = rockchip_saradc_iio_channels,
.num_channels = ARRAY_SIZE(rockchip_saradc_iio_channels),
.clk_rate = 1000000,
.start = rockchip_saradc_start_v1,
.read = rockchip_saradc_read_v1,
.power_down = rockchip_saradc_power_down_v1,
};

static const struct iio_chan_spec rockchip_rk3066_tsadc_iio_channels[] = {
Expand All @@ -174,6 +205,9 @@ static const struct rockchip_saradc_data rk3066_tsadc_data = {
.channels = rockchip_rk3066_tsadc_iio_channels,
.num_channels = ARRAY_SIZE(rockchip_rk3066_tsadc_iio_channels),
.clk_rate = 50000,
.start = rockchip_saradc_start_v1,
.read = rockchip_saradc_read_v1,
.power_down = rockchip_saradc_power_down_v1,
};

static const struct iio_chan_spec rockchip_rk3399_saradc_iio_channels[] = {
Expand All @@ -189,6 +223,9 @@ static const struct rockchip_saradc_data rk3399_saradc_data = {
.channels = rockchip_rk3399_saradc_iio_channels,
.num_channels = ARRAY_SIZE(rockchip_rk3399_saradc_iio_channels),
.clk_rate = 1000000,
.start = rockchip_saradc_start_v1,
.read = rockchip_saradc_read_v1,
.power_down = rockchip_saradc_power_down_v1,
};

static const struct iio_chan_spec rockchip_rk3568_saradc_iio_channels[] = {
Expand All @@ -206,6 +243,9 @@ static const struct rockchip_saradc_data rk3568_saradc_data = {
.channels = rockchip_rk3568_saradc_iio_channels,
.num_channels = ARRAY_SIZE(rockchip_rk3568_saradc_iio_channels),
.clk_rate = 1000000,
.start = rockchip_saradc_start_v1,
.read = rockchip_saradc_read_v1,
.power_down = rockchip_saradc_power_down_v1,
};

static const struct of_device_id rockchip_saradc_match[] = {
Expand Down

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