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ARC: perf: cap the number of counters to hardware max of 32
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The number of counters in PCT can never be more than 32 (while
countable conditions could be 100+) for both ARCompact and ARCv2

And while at it update copyright dates.

Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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Vineet Gupta committed Aug 27, 2015
1 parent fd0881a commit fb7c572
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Showing 2 changed files with 6 additions and 5 deletions.
5 changes: 3 additions & 2 deletions arch/arc/include/asm/perf_event.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
/*
* Linux performance counter support for ARC
*
* Copyright (C) 2014-2015 Synopsys, Inc. (www.synopsys.com)
* Copyright (C) 2011-2013 Synopsys, Inc. (www.synopsys.com)
*
* This program is free software; you can redistribute it and/or modify
Expand All @@ -12,8 +13,8 @@
#ifndef __ASM_PERF_EVENT_H
#define __ASM_PERF_EVENT_H

/* real maximum varies per CPU, this is the maximum supported by the driver */
#define ARC_PMU_MAX_HWEVENTS 64
/* Max number of counters that PCT block may ever have */
#define ARC_PERF_MAX_COUNTERS 32

#define ARC_REG_CC_BUILD 0xF6
#define ARC_REG_CC_INDEX 0x240
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6 changes: 3 additions & 3 deletions arch/arc/kernel/perf_event.c
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
/*
* Linux performance counter support for ARC700 series
*
* Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
* Copyright (C) 2013-2015 Synopsys, Inc. (www.synopsys.com)
*
* This code is inspired by the perf support of various other architectures.
*
Expand All @@ -22,7 +22,7 @@ struct arc_pmu {
struct pmu pmu;
int counter_size; /* in bits */
int n_counters;
unsigned long used_mask[BITS_TO_LONGS(ARC_PMU_MAX_HWEVENTS)];
unsigned long used_mask[BITS_TO_LONGS(ARC_PERF_MAX_COUNTERS)];
int ev_hw_idx[PERF_COUNT_ARC_HW_MAX];
};

Expand Down Expand Up @@ -284,7 +284,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
pr_err("This core does not have performance counters!\n");
return -ENODEV;
}
BUG_ON(pct_bcr.c > ARC_PMU_MAX_HWEVENTS);
BUG_ON(pct_bcr.c > ARC_PERF_MAX_COUNTERS);

READ_BCR(ARC_REG_CC_BUILD, cc_bcr);
BUG_ON(!cc_bcr.v); /* Counters exist but No countable conditions ? */
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