POWERPC: Get rid of remapping the whole immr

The stuff below cleans up the code attempting to remap the whole cpm2_immr
early, as well as places happily assuming that fact. This is more like the 2.4
legacy stuff, and is at least confusing and unclear now.

To keep the world comfortable, a new mechanism is introduced: before accessing
specific immr register/register set, one needs to map it, using cpm2_map(<reg>),
for instance, access to CPM command register will look like
	volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
keeping the code clear, yet without "already defined somewhere" cpm2_immr.

So far, unmapping code is not implemented, but it's not a big deal to add it,
if the whole idea makes sense.

Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>

arch/powerpc/sysdev/cpm2_common.c

@@ -51,6 +51,7 @@ cpm_cpm2_t	*cpmp;		/* Pointer to comm processor space */
  * the communication processor devices.
  */
 cpm2_map_t *cpm2_immr;
+intctl_cpm2_t *cpm2_intctl;
 
 #define CPM_MAP_SIZE	(0x40000)	/* 256k - the PQ3 reserve this amount
 					   of space for CPM as it is larger
@@ -60,6 +61,7 @@ void
 cpm2_reset(void)
 {
 	cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
+	cpm2_intctl = cpm2_map(im_intctl);
 
 	/* Reclaim the DP memory for our use.
 	 */
@@ -94,13 +96,15 @@ cpm_setbrg(uint brg, uint rate)
 	/* This is good enough to get SMCs running.....
 	*/
 	if (brg < 4) {
-		bp = (uint *)&cpm2_immr->im_brgc1;
+		bp = cpm2_map_size(im_brgc1, 16);
 	} else {
-		bp = (uint *)&cpm2_immr->im_brgc5;
+		bp = cpm2_map_size(im_brgc5, 16);
 		brg -= 4;
 	}
 	bp += brg;
 	*bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN;
+
+	cpm2_unmap(bp);
 }
 
 /* This function is used to set high speed synchronous baud rate
@@ -112,16 +116,18 @@ cpm2_fastbrg(uint brg, uint rate, int div16)
 	volatile uint	*bp;
 
 	if (brg < 4) {
-		bp = (uint *)&cpm2_immr->im_brgc1;
+		bp = cpm2_map_size(im_brgc1, 16);
 	}
 	else {
-		bp = (uint *)&cpm2_immr->im_brgc5;
+		bp = cpm2_map_size(im_brgc5, 16);
 		brg -= 4;
 	}
 	bp += brg;
 	*bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN;
 	if (div16)
 		*bp |= CPM_BRG_DIV16;
+
+	cpm2_unmap(bp);
 }
 
 /*
@@ -132,11 +138,14 @@ static spinlock_t cpm_dpmem_lock;
  * until the memory subsystem goes up... */
 static rh_block_t cpm_boot_dpmem_rh_block[16];
 static rh_info_t cpm_dpmem_info;
+static u8* im_dprambase;
 
 static void cpm2_dpinit(void)
 {
 	spin_lock_init(&cpm_dpmem_lock);
 
+	im_dprambase = ioremap(CPM_MAP_ADDR, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE);
+
 	/* initialize the info header */
 	rh_init(&cpm_dpmem_info, 1,
 			sizeof(cpm_boot_dpmem_rh_block) /
@@ -205,6 +214,6 @@ EXPORT_SYMBOL(cpm_dpdump);
 
 void *cpm_dpram_addr(uint offset)
 {
-	return (void *)&cpm2_immr->im_dprambase[offset];
+	return (void *)(im_dprambase + offset);
 }
 EXPORT_SYMBOL(cpm_dpram_addr);

arch/powerpc/sysdev/cpm2_pic.c

@@ -78,7 +78,7 @@ static void cpm2_mask_irq(unsigned int irq_nr)
 	bit = irq_to_siubit[irq_nr];
 	word = irq_to_siureg[irq_nr];
 
-	simr = &(cpm2_immr->im_intctl.ic_simrh);
+	simr = &(cpm2_intctl->ic_simrh);
 	ppc_cached_irq_mask[word] &= ~(1 << bit);
 	simr[word] = ppc_cached_irq_mask[word];
 }
@@ -93,7 +93,7 @@ static void cpm2_unmask_irq(unsigned int irq_nr)
 	bit = irq_to_siubit[irq_nr];
 	word = irq_to_siureg[irq_nr];
 
-	simr = &(cpm2_immr->im_intctl.ic_simrh);
+	simr = &(cpm2_intctl->ic_simrh);
 	ppc_cached_irq_mask[word] |= 1 << bit;
 	simr[word] = ppc_cached_irq_mask[word];
 }
@@ -108,8 +108,8 @@ static void cpm2_mask_and_ack(unsigned int irq_nr)
 	bit = irq_to_siubit[irq_nr];
 	word = irq_to_siureg[irq_nr];
 
-	simr = &(cpm2_immr->im_intctl.ic_simrh);
-	sipnr = &(cpm2_immr->im_intctl.ic_sipnrh);
+	simr = &(cpm2_intctl->ic_simrh);
+	sipnr = &(cpm2_intctl->ic_sipnrh);
 	ppc_cached_irq_mask[word] &= ~(1 << bit);
 	simr[word] = ppc_cached_irq_mask[word];
 	sipnr[word] = 1 << bit;
@@ -127,7 +127,7 @@ static void cpm2_end_irq(unsigned int irq_nr)
 		bit = irq_to_siubit[irq_nr];
 		word = irq_to_siureg[irq_nr];
 
-		simr = &(cpm2_immr->im_intctl.ic_simrh);
+		simr = &(cpm2_intctl->ic_simrh);
 		ppc_cached_irq_mask[word] |= 1 << bit;
 		simr[word] = ppc_cached_irq_mask[word];
 		/*
@@ -152,10 +152,10 @@ int cpm2_get_irq(struct pt_regs *regs)
 	int irq;
 	unsigned long bits;
 
-	/* For CPM2, read the SIVEC register and shift the bits down
-	 * to get the irq number.*/
-	bits = cpm2_immr->im_intctl.ic_sivec;
-	irq = bits >> 26;
+       /* For CPM2, read the SIVEC register and shift the bits down
+         * to get the irq number.         */
+        bits = cpm2_intctl->ic_sivec;
+        irq = bits >> 26;
 
 	if (irq == 0)
 		return(-1);
@@ -223,26 +223,26 @@ void cpm2_pic_init(struct device_node *node)
 
 	/* Mask out everything */
 
-	cpm2_immr->im_intctl.ic_simrh = 0x00000000;
-	cpm2_immr->im_intctl.ic_simrl = 0x00000000;
+	cpm2_intctl->ic_simrh = 0x00000000;
+	cpm2_intctl->ic_simrl = 0x00000000;
 
 	wmb();
 
 	/* Ack everything */
-	cpm2_immr->im_intctl.ic_sipnrh = 0xffffffff;
-	cpm2_immr->im_intctl.ic_sipnrl = 0xffffffff;
+	cpm2_intctl->ic_sipnrh = 0xffffffff;
+	cpm2_intctl->ic_sipnrl = 0xffffffff;
 	wmb();
 
 	/* Dummy read of the vector */
-	i = cpm2_immr->im_intctl.ic_sivec;
+	i = cpm2_intctl->ic_sivec;
 	rmb();
 
 	/* Initialize the default interrupt mapping priorities,
 	 * in case the boot rom changed something on us.
 	 */
-	cpm2_immr->im_intctl.ic_sicr = 0;
-	cpm2_immr->im_intctl.ic_scprrh = 0x05309770;
-	cpm2_immr->im_intctl.ic_scprrl = 0x05309770;
+	cpm2_intctl->ic_sicr = 0;
+	cpm2_intctl->ic_scprrh = 0x05309770;
+	cpm2_intctl->ic_scprrl = 0x05309770;
 
 	/* create a legacy host */
 	if (node)

arch/powerpc/sysdev/cpm2_pic.h

@@ -1,6 +1,8 @@
 #ifndef _PPC_KERNEL_CPM2_H
 #define _PPC_KERNEL_CPM2_H
 
+extern intctl_cpm2_t *cpm2_intctl;
+
 extern int cpm2_get_irq(struct pt_regs *regs);
 
 extern void cpm2_pic_init(struct device_node*);

arch/powerpc/sysdev/fsl_soc.c

@@ -633,7 +633,7 @@ static int __init fs_enet_of_init(void)
 		if (strstr(model, "FCC")) {
 			int fcc_index = fs_get_fcc_index(*id);
 
-			fs_enet_data.dpram_offset = (u32)cpm2_immr->im_dprambase;
+			fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0);
 			fs_enet_data.rx_ring = 32;
 			fs_enet_data.tx_ring = 32;
 			fs_enet_data.rx_copybreak = 240;