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Merge branch 'bnxt_en-Updates-for-net-next'
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Michael Chan says:

====================
bnxt_en: Updates for net-next.

This patchset includes these main changes:

1. Firmware spec. update.
2. Context memory sizing improvements for the hardware TQM block.
3. ethtool chip reset improvements and fixes for correctness.
4. Improve L2 doorbell mapping by mapping only up to the size specified
by firmware.  This allows the RoCE driver to map the remaining doorbell
space for its purpose, such as write-combining.
5. Improve ethtool -S channel statistics by showing only relevant ring
counters for non-combined channels.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller committed May 4, 2020
2 parents 60bcbc4 + 125592f commit fc99584
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Showing 8 changed files with 482 additions and 141 deletions.
100 changes: 68 additions & 32 deletions drivers/net/ethernet/broadcom/bnxt/bnxt.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1766,7 +1766,7 @@ static int bnxt_rx_pkt(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,

rc = -EIO;
if (rx_err & RX_CMPL_ERRORS_BUFFER_ERROR_MASK) {
bnapi->cp_ring.rx_buf_errors++;
bnapi->cp_ring.sw_stats.rx.rx_buf_errors++;
if (!(bp->flags & BNXT_FLAG_CHIP_P5)) {
netdev_warn(bp->dev, "RX buffer error %x\n",
rx_err);
Expand Down Expand Up @@ -1849,7 +1849,7 @@ static int bnxt_rx_pkt(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
} else {
if (rxcmp1->rx_cmp_cfa_code_errors_v2 & RX_CMP_L4_CS_ERR_BITS) {
if (dev->features & NETIF_F_RXCSUM)
bnapi->cp_ring.rx_l4_csum_errors++;
bnapi->cp_ring.sw_stats.rx.rx_l4_csum_errors++;
}
}

Expand Down Expand Up @@ -5045,8 +5045,7 @@ int bnxt_hwrm_vnic_cfg(struct bnxt *bp, u16 vnic_id)
req.dflt_ring_grp = cpu_to_le16(bp->grp_info[grp_idx].fw_grp_id);
req.lb_rule = cpu_to_le16(0xffff);
vnic_mru:
req.mru = cpu_to_le16(bp->dev->mtu + ETH_HLEN + ETH_FCS_LEN +
VLAN_HLEN);
req.mru = cpu_to_le16(bp->dev->mtu + ETH_HLEN + VLAN_HLEN);

req.vnic_id = cpu_to_le16(vnic->fw_vnic_id);
#ifdef CONFIG_BNXT_SRIOV
Expand Down Expand Up @@ -5356,9 +5355,9 @@ static void bnxt_set_db(struct bnxt *bp, struct bnxt_db_info *db, u32 ring_type,
{
if (bp->flags & BNXT_FLAG_CHIP_P5) {
if (BNXT_PF(bp))
db->doorbell = bp->bar1 + 0x10000;
db->doorbell = bp->bar1 + DB_PF_OFFSET_P5;
else
db->doorbell = bp->bar1 + 0x4000;
db->doorbell = bp->bar1 + DB_VF_OFFSET_P5;
switch (ring_type) {
case HWRM_RING_ALLOC_TX:
db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ;
Expand Down Expand Up @@ -6365,6 +6364,7 @@ static int bnxt_hwrm_func_qcfg(struct bnxt *bp)
{
struct hwrm_func_qcfg_input req = {0};
struct hwrm_func_qcfg_output *resp = bp->hwrm_cmd_resp_addr;
u32 min_db_offset = 0;
u16 flags;
int rc;

Expand Down Expand Up @@ -6413,6 +6413,21 @@ static int bnxt_hwrm_func_qcfg(struct bnxt *bp)
if (!bp->max_mtu)
bp->max_mtu = BNXT_MAX_MTU;

if (bp->db_size)
goto func_qcfg_exit;

if (bp->flags & BNXT_FLAG_CHIP_P5) {
if (BNXT_PF(bp))
min_db_offset = DB_PF_OFFSET_P5;
else
min_db_offset = DB_VF_OFFSET_P5;
}
bp->db_size = PAGE_ALIGN(le16_to_cpu(resp->l2_doorbell_bar_size_kb) *
1024);
if (!bp->db_size || bp->db_size > pci_resource_len(bp->pdev, 2) ||
bp->db_size <= min_db_offset)
bp->db_size = pci_resource_len(bp->pdev, 2);

func_qcfg_exit:
mutex_unlock(&bp->hwrm_cmd_lock);
return rc;
Expand All @@ -6434,23 +6449,13 @@ static int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp)
if (!rc) {
struct bnxt_ctx_pg_info *ctx_pg;
struct bnxt_ctx_mem_info *ctx;
int i;
int i, tqm_rings;

ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
if (!ctx) {
rc = -ENOMEM;
goto ctx_err;
}
ctx_pg = kzalloc(sizeof(*ctx_pg) * (bp->max_q + 1), GFP_KERNEL);
if (!ctx_pg) {
kfree(ctx);
rc = -ENOMEM;
goto ctx_err;
}
for (i = 0; i < bp->max_q + 1; i++, ctx_pg++)
ctx->tqm_mem[i] = ctx_pg;

bp->ctx = ctx;
ctx->qp_max_entries = le32_to_cpu(resp->qp_max_entries);
ctx->qp_min_qp1_entries = le16_to_cpu(resp->qp_min_qp1_entries);
ctx->qp_max_l2_entries = le16_to_cpu(resp->qp_max_l2_entries);
Expand Down Expand Up @@ -6483,6 +6488,20 @@ static int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp)
ctx->tim_entry_size = le16_to_cpu(resp->tim_entry_size);
ctx->tim_max_entries = le32_to_cpu(resp->tim_max_entries);
ctx->ctx_kind_initializer = resp->ctx_kind_initializer;
ctx->tqm_fp_rings_count = resp->tqm_fp_rings_count;
if (!ctx->tqm_fp_rings_count)
ctx->tqm_fp_rings_count = bp->max_q;

tqm_rings = ctx->tqm_fp_rings_count + 1;
ctx_pg = kcalloc(tqm_rings, sizeof(*ctx_pg), GFP_KERNEL);
if (!ctx_pg) {
kfree(ctx);
rc = -ENOMEM;
goto ctx_err;
}
for (i = 0; i < tqm_rings; i++, ctx_pg++)
ctx->tqm_mem[i] = ctx_pg;
bp->ctx = ctx;
} else {
rc = 0;
}
Expand Down Expand Up @@ -6735,7 +6754,7 @@ static void bnxt_free_ctx_mem(struct bnxt *bp)
return;

if (ctx->tqm_mem[0]) {
for (i = 0; i < bp->max_q + 1; i++)
for (i = 0; i < ctx->tqm_fp_rings_count + 1; i++)
bnxt_free_ctx_pg_tbls(bp, ctx->tqm_mem[i]);
kfree(ctx->tqm_mem[0]);
ctx->tqm_mem[0] = NULL;
Expand All @@ -6756,6 +6775,7 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
struct bnxt_ctx_pg_info *ctx_pg;
struct bnxt_ctx_mem_info *ctx;
u32 mem_size, ena, entries;
u32 entries_sp, min;
u32 num_mr, num_ah;
u32 extra_srqs = 0;
u32 extra_qps = 0;
Expand Down Expand Up @@ -6845,14 +6865,17 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
ena |= FUNC_BACKING_STORE_CFG_REQ_ENABLES_TIM;

skip_rdma:
entries = ctx->qp_max_l2_entries + extra_qps;
min = ctx->tqm_min_entries_per_ring;
entries_sp = ctx->vnic_max_vnic_entries + ctx->qp_max_l2_entries +
2 * (extra_qps + ctx->qp_min_qp1_entries) + min;
entries_sp = roundup(entries_sp, ctx->tqm_entries_multiple);
entries = ctx->qp_max_l2_entries + extra_qps + ctx->qp_min_qp1_entries;
entries = roundup(entries, ctx->tqm_entries_multiple);
entries = clamp_t(u32, entries, ctx->tqm_min_entries_per_ring,
ctx->tqm_max_entries_per_ring);
for (i = 0; i < bp->max_q + 1; i++) {
entries = clamp_t(u32, entries, min, ctx->tqm_max_entries_per_ring);
for (i = 0; i < ctx->tqm_fp_rings_count + 1; i++) {
ctx_pg = ctx->tqm_mem[i];
ctx_pg->entries = entries;
mem_size = ctx->tqm_entry_size * entries;
ctx_pg->entries = i ? entries : entries_sp;
mem_size = ctx->tqm_entry_size * ctx_pg->entries;
rc = bnxt_alloc_ctx_pg_tbls(bp, ctx_pg, mem_size, 1, false);
if (rc)
return rc;
Expand Down Expand Up @@ -10262,7 +10285,7 @@ static void bnxt_chk_missed_irq(struct bnxt *bp)
bnxt_dbg_hwrm_ring_info_get(bp,
DBG_RING_INFO_GET_REQ_RING_TYPE_L2_CMPL,
fw_ring_id, &val[0], &val[1]);
cpr->missed_irqs++;
cpr->sw_stats.cmn.missed_irqs++;
}
}
}
Expand Down Expand Up @@ -10891,20 +10914,16 @@ static int bnxt_init_board(struct pci_dev *pdev, struct net_device *dev)
bp->dev = dev;
bp->pdev = pdev;

/* Doorbell BAR bp->bar1 is mapped after bnxt_fw_init_one_p2()
* determines the BAR size.
*/
bp->bar0 = pci_ioremap_bar(pdev, 0);
if (!bp->bar0) {
dev_err(&pdev->dev, "Cannot map device registers, aborting\n");
rc = -ENOMEM;
goto init_err_release;
}

bp->bar1 = pci_ioremap_bar(pdev, 2);
if (!bp->bar1) {
dev_err(&pdev->dev, "Cannot map doorbell registers, aborting\n");
rc = -ENOMEM;
goto init_err_release;
}

bp->bar2 = pci_ioremap_bar(pdev, 4);
if (!bp->bar2) {
dev_err(&pdev->dev, "Cannot map bar4 registers, aborting\n");
Expand Down Expand Up @@ -11826,6 +11845,16 @@ static int bnxt_pcie_dsn_get(struct bnxt *bp, u8 dsn[])
return 0;
}

static int bnxt_map_db_bar(struct bnxt *bp)
{
if (!bp->db_size)
return -ENODEV;
bp->bar1 = pci_iomap(bp->pdev, 2, bp->db_size);
if (!bp->bar1)
return -ENOMEM;
return 0;
}

static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
struct net_device *dev;
Expand Down Expand Up @@ -11886,6 +11915,13 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
if (rc)
goto init_err_pci_clean;

rc = bnxt_map_db_bar(bp);
if (rc) {
dev_err(&pdev->dev, "Cannot map doorbell BAR rc = %d, aborting\n",
rc);
goto init_err_pci_clean;
}

dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_SG |
NETIF_F_TSO | NETIF_F_TSO6 |
NETIF_F_GSO_UDP_TUNNEL | NETIF_F_GSO_GRE |
Expand Down
24 changes: 21 additions & 3 deletions drivers/net/ethernet/broadcom/bnxt/bnxt.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -537,6 +537,9 @@ struct nqe_cn {
#define DBR_TYPE_NQ_ARM (0xbULL << 60)
#define DBR_TYPE_NULL (0xfULL << 60)

#define DB_PF_OFFSET_P5 0x10000
#define DB_VF_OFFSET_P5 0x4000

#define INVALID_HW_RING_ID ((u16)-1)

/* The hardware supports certain page sizes. Use the supported page sizes
Expand Down Expand Up @@ -907,6 +910,20 @@ struct bnxt_rx_ring_info {
struct page_pool *page_pool;
};

struct bnxt_rx_sw_stats {
u64 rx_l4_csum_errors;
u64 rx_buf_errors;
};

struct bnxt_cmn_sw_stats {
u64 missed_irqs;
};

struct bnxt_sw_stats {
struct bnxt_rx_sw_stats rx;
struct bnxt_cmn_sw_stats cmn;
};

struct bnxt_cp_ring_info {
struct bnxt_napi *bnapi;
u32 cp_raw_cons;
Expand Down Expand Up @@ -934,9 +951,8 @@ struct bnxt_cp_ring_info {
struct ctx_hw_stats *hw_stats;
dma_addr_t hw_stats_map;
u32 hw_stats_ctx_id;
u64 rx_l4_csum_errors;
u64 rx_buf_errors;
u64 missed_irqs;

struct bnxt_sw_stats sw_stats;

struct bnxt_ring_struct cp_ring_struct;

Expand Down Expand Up @@ -1357,6 +1373,7 @@ struct bnxt_ctx_mem_info {
u16 mrav_num_entries_units;
u8 tqm_entries_multiple;
u8 ctx_kind_initializer;
u8 tqm_fp_rings_count;

u32 flags;
#define BNXT_CTX_FLAG_INITED 0x01
Expand Down Expand Up @@ -1816,6 +1833,7 @@ struct bnxt {
/* ensure atomic 64-bit doorbell writes on 32-bit systems. */
spinlock_t db_lock;
#endif
int db_size;

#define BNXT_NTP_FLTR_MAX_FLTR 4096
#define BNXT_NTP_FLTR_HASH_SIZE 512
Expand Down
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